Senior RTL Engineer

2 settimane fa

Bolzano, Provincia di Bolzano; Trentino-Alto Adige, Italia Capgemini Engineering Tempo pieno

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CAPGEMINI ENGINEERING

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same.

YOUR ROLE

As a Senior RTL Engineer, you will be responsible for driving digital design activities from architecture definition through tape-out, ensuring the successful delivery of high-performance and power-efficient products.

In This Role, You Will

Perform feasibility studies to support system architecture definition, requirements analysis, and interface specification.
Define and develop microarchitectures for complex digital blocks and SoCs.
Implement RTL designs using Verilog, SystemVerilog, or VHDL.
Execute RTL quality checks, including Lint, CDC, and Low Power verification.
Develop timing constraints and support synthesis and timing closure activities.
Collaborate closely with Verification, Synthesis, STA, Physical Design, and DFT teams to achieve functionality, performance, power, and area targets.
Support design bring-up, integration, and tape-out activities.
Create and maintain automation scripts, design flows, and engineering tools to improve development efficiency.
Participate in technical reviews and contribute to continuous improvement initiatives.

YOUR PROFILE

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
6+ years of experience in RTL, ASIC, SoC, or VLSI design.
Strong knowledge of Verilog, SystemVerilog, and/or VHDL.
Proven experience in microarchitecture definition and complex digital design development.
Solid understanding of SoC design methodologies and integration.
Hands-on experience with Lint, CDC, and Low Power design methodologies.
Good knowledge of synthesis flows and Static Timing Analysis (STA).
Familiarity with CPU architectures and instruction sets such as ARM, RISC-V, or x86.
Experience with scripting and programming languages such as Python, Perl, or C.
Understanding of verification methodologies and design flows.
Strong problem-solving skills and attention to detail.
Excellent communication skills and ability to work effectively in multicultural and multidisciplinary environments.

What You’ll Love About Working Here

Join a multicultural and inclusive team environment.
Enjoy a supportive atmosphere promoting work life balance.
Hybrid work.
Your career growth is central to our mission. Our array of career growth programs and diverse professionals are crafted to support you in exploring a world of opportunities.
Access valuable training and certifications in cutting edge technologies.
Engage in exciting national and international projects.
Health and life insurance.
Referral program with bonuses for talent recommendations.
Great office locations.

About Capgemini

Capgemini is the business transformation partner for enterprises in the age of AI. We help organizations imagine and build an intelligent, sustainable future, combining AI, technology and human ingenuity to transform how they operate, innovate and grow. With unique end-to-end capabilities spanning strategy, technology, engineering and intelligent operations, we bring together deep industry expertise and market-leading capabilities in AI, cloud and data to turn ambition into measurable business outcomes at scale. Supported by a robust ecosystem of partners and nearly 60 years of expertise, Capgemini is a responsible and diverse global organization of over 410,000 team members in more than 50 countries.

Senior RTL Engineer

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