SoC Physical Design Engineer: Floorplanning, Timing
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Nokia seeks an experienced ASIC physical design engineer to implement floorplanning, place & route, and power/clock distribution for submicron nodes. You will work with a hardware/RTL team to translate designs into silicon and optimize flows.
This role emphasizes collaboration across cross-functional teams, verification rigor, and automation, with hybrid work and strong learning opportunities in latest nodes and tools.
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Soc Physical Design Engineer
6 giorni fa
Liguria, Liguria, Italia Altro Tempo pienoIn this role, you will implement physical design for Optical Network ASICs across cutting-edge nodes, focusing on power, performance, and area. You will work within a hardware/RTL team to translate designs into silicon and optimize flows for submicron processes. You'll tackle floorplanning, placement, routing, and timing closure, shaping multi-project...
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San Donnino di Liguria, Emilia-Romagna, Italia Altro Tempo pienoNokia seeks an experienced ASIC physical design engineer to implement floorplanning, place & route, and power/clock distribution for submicron nodes. You will work with a hardware/RTL team to translate designs into silicon and optimize flows. xlwpduy Tutti i potenziali candidati sono invitati a leggere con attenzione i seguenti dettagli prima di inviare la...
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Soc Physical Design Engineer
1 giorno fa
San Donnino di Liguria, Emilia-Romagna, Italia Altro Tempo pieno 70.000 € - 100.000 € ContrattoIn this role, you will implement physical design for Optical Network ASICs across cutting-edge nodes, focusing on power, performance, and area. You will work within a hardware/RTL team to translate designs into silicon and optimize flows for submicron processes. You’ll tackle floorplanning, placement, routing, and timing closure, shaping multi-project IP...