Senior HS Digital Design Engineer

1 giorno fa
Vigevano PV, Provincia di Pavia; Lombardia, Italia Altro Tempo pieno

ams Italy S.r.l. is seeking a technical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products.
You will define architectures, lead RTL design and integration, and drive design reviews to ensure quality. The ideal candidate has MSc or PhD in Electrical Engineering with 10+ years of digital IC design experience, strong Verilog/SystemVerilog skills, and hands-on experience with high-speed interfaces and timing

  • Senior HS Digital Design Engineer – SoC RTL Lead

    1 giorno fa

    vigevano, lombardia, Italia ams Italy S.r.l. Tempo pieno

    ams Italy S.r.l. is seeking a technical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products. You will define architectures, lead RTL design and integration, and drive design reviews to ensure quality. The ideal candidate has MSc or PhD in Electrical Engineering with 10+...

  • Principal HS Digital Design Engineer

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    Vigevano (PV), Provincia di Pavia; Lombardia, Italia Altro Tempo pieno

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