Product Testing Engineer

4 settimane fa

Parma, Italia VisLab A tempo pieno

ASIC Design Engineer. Responsibilities: Developing micro-architecture specifications for a next generation Computer Vision processor; Video compression logic, Image processing logic, Vector processors and Device / Memory controllers; Design integration, logic synthesis, and design optimization for timing, area and power; Developing front-end methodologies and tool flows; Requirements: Master's degree in Electrical Engineering with 0-4 years of experience; Very good understanding of VLSI/ASIC design, Computer architecture and Logic design; Good knowledge and experience in using hardware description languages (Verilog/SystemVerilog); Ability to program in scripting languages, like Python and Perl; Knowledge of design verification, and functional coverage; Knowledge and/or experience in the areas of Image/Video processing, computer vision, machine learning are plus; JOBVLSI to careers-it@ambarella.com or apply online on Ambarella website. As an Equal Opportunity/Affirmative Action Employer, Vislab and Ambarella recruit qualified applicants without regard to race, color, national origin, sex, physical disability, or veteran status. Please find at this link our privacy disclaimer dedicated to candidates data, accordingly to the GDPR:

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