SoC Physical Design Engineer – Floorplanning, P&R

In this role, you will implement physical design for Optical Network ASICs across cutting-edge nodes, focusing on power, performance, and area. You will work within a hardware/RTL team to translate designs into silicon and optimize flows for submicron processes. You’ll tackle floorplanning, placement, routing, and timing closure, shaping multi-project IP...

In this role, you will implement physical design for Optical Network ASICs across cutting-edge nodes, focusing on power, performance, and area. You will work within a hardware/RTL team to translate designs into silicon and optimize flows for submicron processes. You’ll tackle floorplanning, placement, routing, and timing closure, shaping multi-project IP...

Chi siamoMove Silicon è la business unit di Move S.p.A. dedicata allo sviluppo di soluzioni ASIC e SoC ad alta efficienza per applicazioni industriali, automotive e IoT. Lavoriamo in stretta collaborazione con clienti globali per portare sul mercato dispositivi analogici e mixed-signal innovativi, con un forte focus sull’affidabilità e sulla...

Chi siamoTutte le competenze, le qualifiche e l'esperienza necessarie per un candidato di successo sono elencate nella seguente descrizione.Move Silicon è la business unit di Move S.p.A. dedicata allo sviluppo di soluzioni ASIC e SoC ad alta efficienza per applicazioni industriali, automotive e IoT. Collaboriamo con clienti globali per portare sul mercato...

Nokia is seeking a SoC Physical Design Engineer in Livorno, Toscana, Italy to implement physical design for Optical Network ASICs. You will handle floorplanning, placement, routing, and timing closure while collaborating with RTL and hardware teams and driving PD methodologies across 3/5/7nm nodes. The role emphasizes automation, verification rigor, and...

Nokia is seeking a SoC Physical Design Engineer in Livorno, Toscana, Italy to implement physical design for Optical Network ASICs.Scopra se questa opportunità è adatta a lei leggendo tutte le informazioni riportate di seguito.You will handle floorplanning, placement, routing, and timing closure while collaborating with RTL and hardware teams and driving PD...

In this role, you will implement physical design for Optical Network ASICs across cutting-edge nodes, focusing on power, performance, and area. You will work within a hardware/RTL team to translate designs into silicon and optimize flows for submicron processes. You’ll tackle floorplanning, placement, routing, and timing closure, shaping multi-project IP...

In this role, you will implement physical design for Optical Network ASICs across cutting-edge nodes, focusing on power, performance, and area. You will work within a hardware/RTL team to translate designs into silicon and optimize flows for submicron processes. You’ll tackle floorplanning, placement, routing, and timing closure, shaping multi-project IP...

In this role, you will implement physical design for Optical Network ASICs across cutting-edge nodes, focusing on power, performance, and area. You will work within a hardware/RTL team to translate designs into silicon and optimize flows for submicron processes. You’ll tackle floorplanning, placement, routing, and timing closure, shaping multi-project IP...