Junior FPGA Site Engineer — Rome

1 ora fa

Rome, Lazio, Italia RINA Piraeus Team Tempo pieno

RINA in Rome is seeking a Junior FPGA Site Engineer to join the Electronics and System Engineering Division and support FPGA-based systems development, integration, and testing in a highly technical environment.

The role requires a Master’s in Electronics, knowledge of VHDL/Verilog, and familiarity with Libero SoC and FPGA tools. xysqume

Dato l'elevato interesse per questa posizione, la preghiamo di candidarsi tempestivamente se il suo profilo è in linea con il ruolo.

The position offers a competitive gross salary range and a welfare package.