ASIC Digital Verification, Sr Staff Engineer

2 giorni fa

Pavia, Italia Synopsys, Inc. A tempo pieno

We are seeking a highly motivated and innovative digital verification engineer with exceptional knowledge in the verification of high-speed digital designs. The candidate would be working as part of a highly experienced mixed-signal design and verification team, and will be involved in verifying current and next generation PAM-based SerDes products.The position offers an excellent opportunity to work with a skilled team of digital and mixed-signal engineers responsible for delivering high-end mixed-signal designs from specification development to performing functional and performance tests on prototype test-chips.Main Responsibilities:Writing modular constrained-random Verilog and System Verilog testbenchesPerforming functional coverageAssertion coverage and code coverageCreating and tracking test-plansEvaluating failure cases and running gate-level simulationsKey Qualifications:BSEE or MSEE with 10+ years of digital verification experience in the industryMust have hands-on experience in writing complex testcases in Verilog and System VerilogMust have familiarity with code quality metricsPreferred Experience / Knowledge:High-speed digital & mixed-signal design & verificationAsynchronous clock domain crossingFamiliar with UVM methodology and verification using VCS/VerdiGood organization and communication skillsAt Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.#J-18808-Ljbffr

  • ASIC Digital Verification, Sr Staff Engineer

    2 giorni fa

    Pavia, Italia Synopsys, Inc. A tempo pieno

    We are seeking a highly motivated and innovative digital verification engineer with exceptional knowledge in the verification of high-speed digital designs. The candidate would be working as part of a highly experienced mixed-signal design and verification team, and will be involved in verifying current and next generation PAM-based SerDes products.The...

  • Digital Verification Engineer, Sr. Staff

    2 giorni fa

    Pavia, Italia Synopsys, Inc. A tempo pieno

    Synopsys is seeking for a highly motivated and innovative digital verification engineer with exceptional knowledge in the verification of high-speed digital designs. The candidate would be working as part of a highly experienced mixed-signal design and verification team and will be involved in verifying current and next generation PAM-based SerDes products....

  • Digital Verification Engineer, Sr. Staff

    2 giorni fa

    Pavia, Italia Synopsys, Inc. A tempo pieno

    Synopsys is seeking for a highly motivated and innovative digital verification engineer with exceptional knowledge in the verification of high-speed digital designs. The candidate would be working as part of a highly experienced mixed-signal design and verification team and will be involved in verifying current and next generation PAM-based SerDes products....

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    2 giorni fa

    Pavia, Italia Synopsys, Inc. A tempo pieno

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    Pavia, Italia Synopsys, Inc. A tempo pieno

    We are seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation PAM-based SerDes products. Strong theoretical and practical background in high-speed serializer...

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    Pavia, Italia Synopsys, Inc. A tempo pieno

    We are seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation PAM-based SerDes products. Strong theoretical and practical background in high-speed serializer...

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    Pavia, Italia Synopsys, Inc. A tempo pieno

    We are seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation PAM-based SerDes products. Strong theoretical and practical background in high-speed serializer...

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    2 giorni fa

    Pavia, Italia Synopsys, Inc. A tempo pieno

    We are seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation PAM-based SerDes products. Strong theoretical and practical background in high-speed serializer...

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    2 giorni fa

    Pavia, Italia Synopsys, Inc. A tempo pieno

    We are seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation PAM-based SerDes products. Strong theoretical and practical background in high-speed serializer...

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    2 giorni fa

    Pavia, Italia Synopsys, Inc. A tempo pieno

    We are seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation PAM-based SerDes products. Strong theoretical and practical background in high-speed serializer...

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    2 giorni fa

    Pavia, Italia Synopsys, Inc. A tempo pieno

    As an ASIC Physical Implementation, Sr Staff Engineer, the successful candidate will work on a variety of advanced SERDES developments including the latest 56/112/224G standards. The digital implementation organization is seeking a motivated person responsible for the physical implementation of complex IPs and testchips across multiple process technologies...

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    2 giorni fa

    Pavia (PV), Italia Synopsys, Inc. A tempo pieno

    We are seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation PAM-based SerDes products. Strong theoretical and practical background in high-speed serializer...

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    2 giorni fa

    Pavia (PV), Italia Synopsys, Inc. A tempo pieno

    We are seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation PAM-based SerDes products. Strong theoretical and practical background in high-speed serializer...

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    2 giorni fa

    Pavia (PV), Italia Synopsys, Inc. A tempo pieno

    As an ASIC Physical Implementation, Sr Staff Engineer, the successful candidate will work on a variety of advanced SERDES developments including the latest 56/112/224G standards. The digital implementation organization is seeking a motivated person responsible for the physical implementation of complex IPs and testchips across multiple process technologies...

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    Pavia, Lombardia, Italia Synopsys A tempo pieno

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    Pavia, Lombardia, Italia Synopsys A tempo pieno

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    Pavia, Italia Synopsys, Inc. A tempo pieno

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