Senior Functional Verification Engineer — Hybrid

Openchip & Software Technologies S.L. in Rome, Italy, seeks a Senior Functional Verification Engineer to lead verification across HW/SW interfaces, using SystemVerilog/UVM, SystemC/C++, and advanced verification techniques.You will collaborate with architecture, design and software teams to ensure highest performance, with a hybrid work model in Rome and...

Openchip & Software Technologies S.L. in Rome, Italy, seeks a Senior Functional Verification Engineer to lead verification across HW/SW interfaces, using SystemVerilog/UVM, SystemC/C++, and advanced verification techniques.You will collaborate with architecture, design and software teams to ensure highest performance, with a hybrid work model in Rome and...

The RoleScopra di più sui compiti quotidiani, le responsabilità generali e l'esperienza richiesta per questa opportunità scorrendo subito verso il basso.As aSeniorFunctional Verification Engineer,you will be interfacing with architecture, design, physical implementation and software teams in order to make sure that the systems are performing to the...

The RoleScopra di più sui compiti quotidiani, le responsabilità generali e l'esperienza richiesta per questa opportunità scorrendo subito verso il basso.As aSeniorFunctional Verification Engineer,you will be interfacing with architecture, design, physical implementation and software teams in order to make sure that the systems are performing to the...

The RoleAs a Functional Verification Principal Engineer, you will be interfacing with architecture, de-sign, physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work will involve high-level modelling, UVM, HW/SW Co-Debug, Simulation Acceleration support.The RoleAs a Functional...

The RoleSia tra i primi a candidarsi: legga la panoramica completa del ruolo qui sotto, quindi invii la sua candidatura per essere preso/a in considerazione.As a Functional Verification Principal Engineer, you will be interfacing with architecture, de-sign, physical implementation and software teams in order to make sure that the systems are performing to...

The Role As a Functional Verification Principal Engineer, you will be interfacing with architecture, de-sign, physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work will involve high-level modelling, UVM, HW/SW Co-Debug, Simulation Acceleration support. The Role As a Functional...

A leading IT consulting firm is seeking a Senior Design Verification Engineer to join their team in Rome.Si assicuri di leggere attentamente le informazioni relative a questa opportunità prima di inviare la sua candidatura.In this role, you'll focus on verifying advanced interconnect systems in state-of-the-art microprocessors.The ideal candidate will have...

Senior Design Verification Engineer - Data Fabric Systems As Design Verification Engineer, you will join a leading-edge team responsible for the verification of advanced interconnect systems in state‑of‑the‑art microprocessors. This role focuses on ensuring the functionality, performance, and reliability ofores high‑bandwidth data communication...