Staff Silicon Design Engineer

Overview WHAT YOU DO AT AMD CHANGES EVERYTHING – At AMD, our mission is to build great products that accelerate next‑generation computing experiences, from AI and data centers to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. Position The AMD SerDes team is hiring a Staff‑level Analog Circuit Design Engineer to work on SerDes products up to 200+ Gbps on the latest CMOS FinFET nodes. The role focuses on the high‑speed transmission and recovery of data over wired links, including: High‑speed (100 GSps+ ) data converters for signal recovery (ADC) and transmit signal conditioning (DAC) Continuous‑time equalisers with programmable gain and BW up to 60+ GHz Wide‑range, low‑noise PLLs operating up to 20+ GHz Injection‑locked oscillators for multi‑phase clock generation High‑speed clock distribution and correction circuits Custom digital circuits for data serialisation High‑speed wired channel termination and driver circuits The successful candidate will work with a world‑class team to develop SerDes solutions that enable future connectivity of AMD CPU, GPU and FPGA products. Role The role requires the design of high‑speed, high‑performance analog circuits at the lowest possible power. Extensive experience in design and verification of analog circuits and systems is expected, including layout floor‑planning, understanding of layout‑dependent effects and post‑layout verification. Person Passion for high‑speed analog circuit design and verification. Team player with excellent communication skills and experience collaborating across sites and time zones. Strong analytical and problem‑solving skills, willing to learn and take on challenges. Key Responsibilities Design analog circuits for SerDes PHY development to meet block‑level specifications. Verify circuit designs to ensure functional, performance and reliability targets using industry‑standard tools and methodologies. Present and share design progress with peers. Participate in design reviews of other circuits for issue identification and learning. Communicate with SerDes circuit team members at other sites to share ideas. Feed back circuit performance information to the architecture team for system modelling. Support the system‑level verification team in modelling analog circuits in Verilog and debugging identified issues. Assist with silicon bring‑up and debug. Preferred Experience Good analog circuit design and analysis skills. Experience with industry‑standard schematic entry and circuit simulation tools. Good programming / scripting skills. Familiarity with layout‑effect impact on circuit design. Experience with circuit floor‑planning. Prior high‑speed circuit design experience is a benefit. Experience in silicon debug, verification and characterization. Good interpersonal / teamwork skills. Academic Credentials Bachelors or Masters degree in Electronic / Electrical Engineering. #LI-DB1 #LI-REMOTE Benefits Benefits offered are described – AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal‑opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr