Lavori attuali relativi a Senior Design Verification Engineer - giuliano di roma - Luxoft
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Senior Design Verification Engineer
4 settimane fa
giuliano di roma, Italia IC Resources A tempo pienoSenior Design Verification Engineer - RomeI am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other advanced...
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Senior Design Verification Engineer
2 settimane fa
Giuliano di Roma, Italia Luxoft A tempo pienoSenior Design Verification Engineer - Data Fabric SystemsAs Design Verification Engineer, you will join a leading-edge team responsible for the verification of advanced interconnect systems in state‑of‑the‑art microprocessors. This role focuses on ensuring the functionality, performance, and reliability ofores high‑bandwidth data communication...
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Senior Design Verification Engineer
1 giorno fa
giuliano di roma, Italia Luxoft A tempo pienoSenior Design Verification Engineer - Data Fabric SystemsAs Design Verification Engineer, you will join a leading-edge team responsible for the verification of advanced interconnect systems in state‑of‑the‑art microprocessors. This role focuses on ensuring the functionality, performance, and reliability ofores high‑bandwidth data communication...
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Senior Design Verification Engineer
2 settimane fa
Giuliano di Roma, Italia Luxoft A tempo pienoSenior Design Verification Engineer - Data Fabric Systems As Design Verification Engineer, you will join a leading-edge team responsible for the verification of advanced interconnect systems in state‑of‑the‑art microprocessors. This role focuses on ensuring the functionality, performance, and reliability ofores high‑bandwidth data communication...
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Senior Design Verification Engineer
2 settimane fa
roma, Italia IC Resources A tempo pienoSenior Design Verification Engineer - Rome I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other advanced...
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Senior Design Verification Engineer
2 settimane fa
Roma, Italia IC Resources A tempo pienoSenior Design Verification Engineer - Rome I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other advanced...
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Senior Engineer, Design Verification Engineering
2 settimane fa
Roma, Italia IC Resources A tempo pienoSenior Design Verification Engineer - Rome I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. Experience with scripting languages such as Python, Perl or Bash Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential This Senior...
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Senior Design Verification Engineer
2 settimane fa
Roma, Italia IC Resources A tempo pienoSenior Design Verification Engineer - Rome I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge So C designs that will shape the future of AI, HPC, and other advanced...
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Senior Design Verification Engineer
1 ora fa
Roma, Italia Luxoft A tempo pienoSenior Design Verification Engineer - Data Fabric Systems As Design Verification Engineer, you will join a leading-edge team responsible for the verification of advanced interconnect systems in state‑of‑the‑art microprocessors. This role focuses on ensuring the functionality, performance, and reliability ofores high‑bandwidth data communication...
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Senior Design Verification Engineer
32 minuti fa
Roma, Italia Luxoft A tempo pienoSenior Design Verification Engineer - Data Fabric Systems As Design Verification Engineer, you will join a leading-edge team responsible for the verification of advanced interconnect systems in state‑of‑the‑art microprocessors. This role focuses on ensuring the functionality, performance, and reliability ofores high‑bandwidth data communication...
Senior Design Verification Engineer
37 minuti fa
Project Description (VR- ) We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. As Design Verification Engineer, you will join leading-edge team responsible for the verification of advanced interconnect systems in state-of-the-art microprocessors. This role focuses on ensuring the functionality, performance, and reliability of high-bandwidth data communication architectures. We are looking for someone who has a passion for modern, complex processor architecture, digital design, and verification in general. Who are a team player and has good communication skills, strong analytical and problem-solving skills and willing to learn and ready to accept challenges. Responsibilities Perform pre-Silicon Verification of next generation high performance Microprocessor designs and related IPs Develop, document and execute on verification test plans at unit level of design hierarchy Develop high level language testbench components including stimulus drivers, behavioral models, monitors and checkers in SystemVerilog Develop, simulate and debug directed/random stimulus to ensure design functionality according to specifications Qualifications Minimum of 5 years experience in Digital Design Verification Strong skills with System Verilog and UVM. Good skills with Verilog Exposure to both maintaining an existing Verification Environment as well as creating one from scratch Experience with functional verification tools by VCS, Cadence, Mentor Graphics Experience working in a Unix/Linux environment Good scripting skills (Perl, Shell, Ruby)
