Low-Power ASIC Design Engineer – RTL to Validation
4 settimane fa
A leading technology firm in Calderara di Reno, Italy is seeking an Engineer to evaluate IP blocks and ensure high-quality RTL designs. Candidates should have a degree in Electrical Engineering and experience in digital design. The role involves collaborating with verification and validation teams to define testing protocols. We offer an inclusive work environment focused on innovation and success while valuing diversity.#J-18808-Ljbffr
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Low-Power ASIC Design Engineer
4 settimane fa
Cagliari, Italia Amazon A tempo pienoA leading technology firm in Calderara di Reno, Italy is seeking an Engineer to evaluate IP blocks and ensure high-quality RTL designs. Candidates should have a degree in Electrical Engineering and experience in digital design. The role involves collaborating with verification and validation teams to define testing protocols. We offer an inclusive work...
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Low-Power ASIC Design Engineer
4 settimane fa
Cagliari, Italia Amazon A tempo pienoA leading technology firm in Calderara di Reno, Italy is seeking an Engineer to evaluate IP blocks and ensure high-quality RTL designs. Candidates should have a degree in Electrical Engineering and experience in digital design. The role involves collaborating with verification and validation teams to define testing protocols. We offer an inclusive work...
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ASIC Design Engineer, Blink/Ring ASIC Team
4 settimane fa
Cagliari, Italia Vendita al dettaglio e all'ingrosso Import-export A tempo pienoJob ID: | Evi Technologies Limited - C67Key job responsibilitiesEvaluate 3rd party IP blocksEstimate power, performance, and area for significant IPs early in design cycleExecute on design specifications to deliver high quality RTLEnsure quality by running and tracking results of front-end tools including: Synthesis, Lint (RTL, DFT, UPF), Power Analysis and...
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ASIC Design Engineer, Blink/Ring ASIC Team
4 settimane fa
Cagliari, Italia Amazon A tempo pienoJob ID: 3086439 | Evi Technologies Limited - C67 Key job responsibilities Evaluate 3rd party IP blocks Estimate power, performance, and area for significant IPs early in design cycle Execute on design specifications to deliver high quality RTL Ensure quality by running and tracking results of front-end tools including: Synthesis, Lint (RTL, DFT, UPF), Power...
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ASIC Design Engineer, Blink/Ring ASIC Team
4 settimane fa
Cagliari, Italia Amazon A tempo pienoJob ID: 3086439 | Evi Technologies Limited - C67 Key job responsibilities - Evaluate 3rd party IP blocks - Estimate power, performance, and area for significant IPs early in design cycle - Execute on design specifications to deliver high quality RTL - Ensure quality by running and tracking results of front-end tools including: Synthesis, Lint (RTL, DFT,...
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Digital Design Engineer
4 settimane fa
Cagliari, Italia Amazon A tempo pienoJob ID: 3086439 | Evi Technologies Limited - C67 Estimate power, performance, and area for significant IPs early in design cycle Execute on design specifications to deliver high quality RTL Ensure quality by running and tracking results of front-end tools including: Synthesis, Lint (RTL, DFT, UPF), Power Analysis and STA Work with pre-silicon...
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Open Linux Validation Engineer
3 giorni fa
Cagliari, Italia Telit Cinterion A tempo pienoJoin to apply for the Open Linux Validation Engineer role at Telit Cinterion1 day ago Be among the first 25 applicantsAs a Validation Engineer, you will collaborate with our R&D team to evaluate IoT Wireless Products on Open Linux enabled platforms. Your responsibilities will include, among others, the creation, analysis and debug of applications written...
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Open Linux Validation Engineer
2 giorni fa
cagliari, Italia Telit Cinterion A tempo pienoJoin to apply for the Open Linux Validation Engineer role at Telit Cinterion1 day ago Be among the first 25 applicantsAs a Validation Engineer, you will collaborate with our R&D team to evaluate IoT Wireless Products on Open Linux enabled platforms. Your responsibilities will include, among others, the creation, analysis and debug of applications written...
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Open Linux Validation Engineer
2 giorni fa
Cagliari, Italia Telit Cinterion A tempo pienoJoin to apply for the Open Linux Validation Engineer role at Telit Cinterion1 day ago Be among the first 25 applicantsAs a Validation Engineer, you will collaborate with our R&D team to evaluate IoT Wireless Products on Open Linux enabled platforms.Your responsibilities will include, among others, the creation, analysis and debug of applications written with...
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Open Linux Validation Engineer
4 giorni fa
Cagliari, Italia Telit Cinterion A tempo pienoJoin to apply for the Open Linux Validation Engineer role at Telit Cinterion 1 day ago Be among the first 25 applicants As a Validation Engineer, you will collaborate with our R&D team to evaluate IoT Wireless Products on Open Linux enabled platforms. Your responsibilities will include, among others, the creation, analysis and debug of applications written...