2026-IpdDip-03-diii - Research of Ultra-Wideband Noise-Cancelling CMOS LNA Solutions for FEM-Less Receivers
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Organisation/Company Università di Pavia Research Field Engineering Researcher Profile Recognised Researcher (R2) Leading Researcher (R4) First Stage Researcher (R1) Established Researcher (R3) Application Deadline 25 Nov 2026 - 12:00 (UTC) Country Italy Type of Contract To be defined Job Status Not Applicable Is the job funded through the EU Research Framework Programme? Not funded by a EU programme Is the Job related to staff position within a Research Infrastructure? No
Offer Description
State-of-the art receiver architectures rely on multiple cascaded GaAs LNA stages integrated within the front-end module (FEM), followed by a PCB balun that interfaces the FEM with the CMOS integrated circuit. This approach provides high performance, but increases power consumption, cost, and overall system complexity. The scope of this project is to find a CMOS-based wideband LNA architecture that can overcome these challenges by exploiting advanced noise cancellation and analog linearization techniques. The goal is to approach the RF performance of GaAs-based LNAs with equal or lower power dissipation. The research will include architecture development, circuit design, layout, and silicon characterization.
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Eligibility of fellows: country/ies of residence:
- AFRICA
- EUROPE
- OCEANIA
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- SOUTH AMERICA
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Eligibility of fellows: nationality/ies:
- AFRICA
- EUROPE
- OCEANIA
- NORTH AMERICA
- SOUTH AMERICA
- ASIA
- OTHER