Senior SoC Verification Engineer

A leading semiconductor organization is seeking an experienced Senior Design Verification Engineer to join their team in Rome. This role offers the chance to contribute to innovative SoC designs that will shape the future of AI and HPC. The ideal candidate will have a Master's degree and proven experience in verification methodologies, with expertise in UVM...

Senior Design Verification Engineer - Rome I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting‑edge SoC designs that will shape the future of AI, HPC, and other...

A nonprofit research and technology organization in Italy is seeking an experienced Verification Engineer to develop and validate advanced digital IPs and SoC platforms. Key responsibilities include defining verification strategies, developing UVM-based environments, and collaborating with design teams. Ideal candidates will have a master's degree in...

A nonprofit research and technology organization in Italy is seeking an experienced Verification Engineer. You will support the development and validation of advanced digital IPs and SoC platforms, focusing on creating verification environments and collaborating with design teams. The role offers competitive compensation and a hybrid work policy, making it...

Role The Chips-IT Foundation is seeking an experienced Verification Engineer to support the development and validation of advanced digital IPs and System-on-Chip (SoC) platforms. The role focuses on creating and maintaining verification environments using industry-standard methodologies (e.g., UVM), ensuring functional correctness of designs from...

Role The Chips-IT Foundation is seeking an experienced Verification Engineer to support the development and validation of advanced digital IPs and System-on-Chip (SoC) platforms. The role focuses on creating and maintaining verification environments using industry-standard methodologies (e.g., UVM), ensuring functional correctness of designs from...

The Role As a Senior Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW / SW Co-Debug Simulation Acceleration support. Key Responsibilities Reading and...

A technology company in Rome is looking for a Senior Functional Verification Engineer to lead verification efforts for complex systems. The candidate should have a Master's degree and at least 7 years of experience in verification processes. Responsibilities include developing and maintaining verification environments, executing plans, and mentoring junior...

A leading semiconductor technology company is seeking a Senior DFT Engineer to join their multicore in-memory-compute SoC team. The ideal candidate will have at least 5 years of DFT engineering experience, particularly with complex SoC projects. Responsibilities include implementing test solutions, collaborating with engineering teams across Europe, and...

The Role As a Functional Verification Principal Engineer, you will be interfacing with architecture, design, physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work will involve high‑level modelling, UVM, HW / SW Co‑Debug, Simulation Acceleration support. Key Responsibilities...