Principal Hs Digital Design Engineer

2 giorni fa

Pavia, Italia Exelero AG Tempo pieno

Job description:

  • Technical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products
  • Define digital subsystem architectures
  • Lead RTL development and integration
  • Drive design reviews and quality standards
  • Support verification and implementation teams
  • Mentor design engineers
Profile description:
  • MSc or PhD in Electrical Engineering