SoC Physical Design Engineer for Next-Gen ASICs

17 ore fa

Terni, Umbria, Italia Nokia Tempo pieno 65.000 € - 100.000 € Contratto

Nokia in Umbria, Italy seeks a SoC Physical Design Engineer to drive floorplanning, placement, routing and timing closure for 3/5/7nm ASICs. You will optimize power, performance and area within a hardware/RTL team, translating designs into silicon and advancing PD methodologies.

Collaborate with RTL designers, run IV/DT verifications, and develop automation scripts using TCL/Python to streamline Synthesis through GDSII for multi-project IPs.