Digital Design Engineer

2 giorni fa

Livorno, Italia Apple Inc. A tempo pieno

At Apple, we work every single day to craft products that enrich people's lives. The people here at Apple don't just build products - they create the kind of wonder that revolutionizes entire industries. We invite you to join our dynamic group for the unique and rewarding opportunity to contribute to upcoming products that will delight and inspire millions of Apple's customers every day Apple's PMU Hardware Tech team is responsible for delivering power in a highly configurable and controlled way to the high-end Apple SoCs, which power everything from Apple Watch and Apple TV to iPhone, iPad, and Mac. We're looking for dedicated Engineers who can help us innovate the way we verify power management devices, provide industry-leading power and battery efficiency, and achieve customer expectations of device performance. Do you love working on challenges that no one has solved yet? Then we welcome you to work among the industry's best As a member of the Digital Design Team, you will assist with delivering high-quality chips to meet performance, feature, timing, area, power, and efficiency goals. We will provide you with mentorship and the opportunity to collaborate with world-class Design Engineers, as well as work alongside our design verification, SoC platform architecture, and physical design teams. You will have the opportunity to be part of a team delivering PMU silicon directly into next-generation Apple products. Description You will work within the Digital Design Team to refine or create requirements and specifications, collaborate with the analog design and design verification teams, create/update RTL designs, and run simulations to check your design. This could include tasks such as implementing bespoke control of analog circuits, creating state machines to control the system, or working on industry-standard interfaces to high-performance SoCs. Your designs will need to balance energy efficiency and area constraints with project schedule and maintainability. You will also review synthesis and power reports, root-cause and resolve timing and power issues, and ensure maximal QoR throughout your design. Minimum Qualifications A Master's or Ph.D. in electrical engineering, Communication Engineering, Computer Science/Software Engineering, or equivalent. Preferred Qualifications Strong familiarity with modern, energy-efficient/low-power logic design techniques. Strong familiarity with RTL design in Verilog/VHDL, CPU bus architectures, and mixed signal design. Strong familiarity with synthesis, STA, and quality checks such as Lint and CDC/RDC finite state machines. Excellent interpersonal skills and well-organized working style. Ability to work well in a team and be productive under tight schedules. Strong analytical/problem-solving skills. Proficient in using (System)Verilog, with the ability to analyze RTL/Netlist designs, and outstanding debugging skills to tackle technical challenges. J-18808-Ljbffr

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