Lavori attuali relativi a Asic Digital Design, Sr Staff Engineer - Bardi - Synopsys
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Asic Physical Design, Sr Staff Engineer
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Bardi, Italia Synopsys A tempo pienoAs a ASIC Physical Implementation, Sr Staff Engineer, the successful candidate will work on a variety of advanced SERDES developments including the latest 56/112/224G standards. The digital implementation organization is seeking a motivated person responsible for the physical implementation of complex IPs and testchips across multiple process technologies...
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Asic Physical Design, Sr Staff Engineer
3 settimane fa
Bardi, Italia Synopsys A tempo pienoAs a ASIC Physical Implementation, Sr Staff Engineer, the successful candidate will work on a variety of advanced SERDES developments including the latest 56/112/224G standards. The digital implementation organization is seeking a motivated person responsible for the physical implementation of complex IPs and testchips across multiple process technologies...
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Asic Digital Design, Staff Engineer
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Bardi, Italia Synopsys A tempo pienoJob Description and RequirementsSeeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation PAM-based SerDes products. Strong theoretical and practical background in...
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Asic Digital Design Engineer, Staff
3 settimane fa
Bardi, Italia Synopsys A tempo pienoWe are seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation PAM-based SerDes products. Strong theoretical and practical background in high-speed serializer...
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Asic Digital Design, Staff Engineer
3 settimane fa
Bardi, Italia Synopsys A tempo pienoWe are seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation PAM-based SerDes products. Strong theoretical and practical background in high-speed serializer...
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Asic Digital Design Engineer, Staff
3 settimane fa
Bardi, Italia Synopsys A tempo pienoWe are seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow.The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation PAM-based SerDes products.Strong theoretical and practical background in high-speed serializer and...
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Asic Digital Design, Staff Engineer
3 settimane fa
Bardi, Italia Synopsys A tempo pienoWe are seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow.The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation PAM-based SerDes products.Strong theoretical and practical background in high-speed serializer and...
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Asic Digital Design, Sr Engineer
1 settimana fa
Bardi, Italia Synopsys A tempo pienoSeeking a highly motivated and innovative design engineer with background in high-speed protocols. Working as part of an experienced digital design and verification team. The position offers an excellent opportunity to work with experts on several fields. The candidate will be involved at specify, design and implement phases of state-of-the-art products.Key...
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Asic Digital Verification, Sr Staff Engineer
3 settimane fa
Bardi, Italia Synopsys A tempo pienoWe are seeking a highly motivated and innovative digital verification engineer with exceptional knowledge in the verification of high-speed digital designs. The candidate would be working as part of a highly experienced mixed-signal design and verification team, and will be involved in verifying current and next generation PAM-based SerDes products.The...
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Layout Design, Sr Staff Engineer
3 settimane fa
Bardi, Italia Synopsys A tempo pienoAs Layout Design Sr Staff Engineer you will contribute in the development of advanced analog integrated circuit designs using best-in-class Synopsys suite of tools. You will be working with local and global teams in developing layout for complex mixed-signal designs in the latest technology nodes.In your role you will be responsible for taking on top-level...
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Asic Digital Verification Sr Engineer
3 settimane fa
Bardi, Italia Synopsys A tempo pienoWe are seeking a highly motivated and innovative digital verification engineer with exceptional knowledge in the verification of high-speed digital designs. The candidate would be working as part of a highly experienced mixed-signal design and verification team and will be involved in verifying current and next generation PAM-based SerDes products.The...
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Asic Digital Design, Principal Engineer
4 mesi fa
Bardi, Italia Synopsys A tempo pienoJob Description and RequirementsSynopsys is seeking a highly motivated and innovative digital verification engineer with exceptional knowledge in the verification of high-speed digital designs. The candidate would be working as part of a highly experienced mixed-signal design and verification team, and will be involved in verifying current and next...
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Digital Verification Engineer, Sr. Staff
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Bardi, Emilia-Romagna, Italia Synopsys A tempo pienoSynopsys is seeking a highly skilled digital verification engineer to join its team. The ideal candidate will have exceptional knowledge in the verification of high-speed digital designs and experience working with complex testcases in Verilog and SystemVerilog.The successful candidate will be part of a highly experienced mixed-signal design and verification...
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Digital Verification Engineer
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Bardi, Emilia-Romagna, Italia Synopsys A tempo pienoWe are seeking a highly skilled digital verification engineer to join our team at Synopsys. The ideal candidate will have exceptional knowledge in the verification of high-speed digital designs and experience working with complex testcases in Verilog and System Verilog.Main Responsibilities:Writing modular constrained-random testbenchesPerforming functional...
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Digital Front End Design Engineer
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Digital Verification Engineer, Sr. Staff
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Bardi, Italia Synopsys A tempo pienoSynopsys is seeking for a highly motivated and innovative digital verification engineer with exceptional knowledge in the verification of high-speed digital designs.The candidate would be working as part of a highly experienced mixed-signal design and verification team and will be involved in verifying current and next generation PAM-based SerDes...
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Bardi, Italia Inventvm Semiconductor A tempo pienoFrom Master Thesys or PhD sponsorship to taking the next step forward in your career: if you are interested in learning more, send your resume to ****** INVENTVM is actively seeking a Senior Digital Design Engineer to design and develop high-speed and low power digital circuits for the digital signal processing core and control logic of products using...
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High-Speed Digital Design Engineer
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Bardi, Emilia-Romagna, Italia Synopsys A tempo pienoWe are seeking a highly skilled digital design engineer with expertise in ASIC development flow. The ideal candidate will be working as part of a highly experienced mixed-signal design and verification team, targeting cutting-edge PAM-based SerDes products. Strong theoretical and practical background in high-speed serializer and data recovery circuits is a...
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Digital Senior Design Engineer
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Asic Digital Design, Sr Staff Engineer
3 mesi fa
Job Description and RequirementsSynopsys is seeking for a highly motivated and innovative digital verification engineer with exceptional knowledge in the verification of high-speed digital designs. The candidate would be working as part of a highly experienced mixed-signal design and verification team and will be involved in verifying current and next generation PAM-based SerDes products. The position offers an excellent opportunity to work with a skilled team of digital and mixed-signal engineers responsible for delivering high-end mixed-signal designs from specification development to performing functional and performance tests on prototype test-chips.Main Responsibilities:Writing modular constrained-random Verilog and System Verilog testbenches Performing functional coverage Assertion coverage and code coverage Creating and tracking test-plans Evaluating failure cases and running gate-level simulations Key Qualifications:BSEE or MSEE with 10+ years of digital verification experience in the industry Must have hands-on experience in writing complex testcases in Verilog and SystemVerilog Must have familiarity with code quality metrics Preferred Experience / Knowledge High-speed digital & mixed-signal design & verification Asynchronous clock domain crossing Familiar with UVM methodology and verification using VCS/Verdi Good organization and communication skills At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world's broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. Job CategoryEngineering CountryItaly Job SubcategoryASIC Digital Design Hire TypeEmployeeRequisition Number: 49463BRHiring Location: ITALY - Agrate Brianza, ITALY - Pavia