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Senior Design Engineer for High-Speed DDR Interfaces

2 mesi fa

Milano, Lombardia, Italia Ferroelectric Memory A tempo pieno

About Ferroelectric Memory

Ferroelectric Memory is a leading developer of innovative Non-Volatile Memory solutions for various applications. Our cutting-edge technology has enabled us to establish ourselves as a significant player in the Memory industry.

Job Summary

We are seeking an experienced Senior Design Engineer to join our team and contribute to the design and development of high-speed DDR interfaces. The ideal candidate will have a strong background in high-speed interface design and experience with DDR4 RTL design for memory or controller devices.

Key Responsibilities

  • Design and verification of high-speed DDR control logic interface, including command decode, address registers, mode registers, data path, and clock tree
  • Perform synthesis, timing, and power analysis
  • Optimize performance, power, and area parameters
  • Collaborate with AMS, verification, and layout teams to ensure compliance with JEDEC specifications

Requirements

  • 8+ years of experience in high-speed interface design
  • DDR4 RTL design experience for memory or controller devices
  • Familiarity with industry-standard design and simulation tools (e.g., VDI, Xcelium, Genus, Conformal)

What We Offer

  • An inspiring work environment with flat hierarchies
  • Opportunities for personal and professional growth, including complimentary training
  • A multi-cultural team with regular team events
  • Urban Sports Club membership
  • Free public transportation ticket or fuel voucher
  • Lunch allowance
  • A competitive salary in a semiconductor environment