Senior FPGA Design Verification Engineer

7 giorni fa


Italia Civitanavi Systems Srl Unipersonale A tempo pieno
Job Overview

Civitanavi Systems S.p.A. is a leading player in the design, development and manufacture of high-tech solutions for Navigation, Control and Stabilization Systems, serving various industries.

Estimated Salary: €70,000 - €90,000 per yearKey Responsibilities:
  • Collaborate with FPGA design team to establish test priorities and coverage targets.
  • Develop and implement verification methodologies, architectures, and infrastructure.
  • Design and develop testbenches using VHDL and execute test procedures by simulations and on-target tests.
  • Generate reports and verification matrices to ensure coverage of requirements.
  • Support project planning efforts and ensure execution to schedule.
Requirements:
  • Master's degree in Electronic Engineering or similar field.
  • Minimum 3 years of experience in coding, simulating, and verifying VHDL code for FPGA.
  • Experience with EDA tools such as HDL simulators and FPGA design tools.
  • Strong interpersonal and communication skills.
Preferred Qualifications:
  • Experience with Mentor Questasim and Xilinx Vivado.
  • Knowledge of DO-254 standard and integration experience using SoC devices.
  • Version control experience (SVN, GIT).


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