Senior Analog Layout Engineer

2 settimane fa


Pavia, Lombardia, Italia Synopsys A tempo pieno
Job Summary

We are seeking a highly skilled Senior Analog Layout Engineer to join our Solutions IP Design Group at Synopsys. As a key member of our team, you will contribute to the development of advanced analog integrated circuit designs using best-in-class Synopsys tools.

Key Responsibilities
  • Design and develop complex mixed-signal layouts for advanced analog integrated circuits
  • Collaborate with local and global teams to develop and review layout designs
  • Take ownership of top-level block design and technical guidance
  • Implement ESD design constraints and latch-up risk mitigation techniques
  • Optimize layout designs for signal integrity, reliability, and parasitic effects
  • Develop and maintain expertise in custom digital layout and associated logic path routing
  • Work with Jira/Atlassian tools and other software applications
Requirements
  • MSEE or BSEE with at least 15+ years of related experience
  • Proven track record of resolving complex issues and exercising judgment
  • Ability to work autonomously and collaboratively in a fast-paced design environment
  • Excellent communication and technical skills
About Synopsys

Synopsys is a leader in silicon IP and design solutions, empowering innovation in the Era of Smart Everything. We offer a broad portfolio of silicon IP, including logic, memory, interfaces, analog, security, and embedded processors. Our solutions help customers integrate more capabilities into their SoCs, faster, and with reduced risk.

We are committed to inclusion and diversity, and we consider all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.



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