Senior Mixed Signal Verification Engineer
4 settimane fa
Powering Innovation
At Allegro Microsystems, we're passionate about developing cutting-edge power management solutions that drive a safer, more sustainable, and autonomous future.
We're seeking a highly skilled and motivated Senior Mixed-Signal Design Verification Engineer to join our team and play a critical role in shaping the future of power electronics.
As a Senior member of our Power Management team, you'll be a key contributor to designing and verifying our next-generation power management ICs, ensuring their quality, robustness, and ultimate success in the automotive, industrial, and consumer markets.
Key Responsibilities:
- Develop and implement comprehensive verification plans for complex mixed-signal IC designs, covering both analog and digital functionality.
- Design and develop testbenches using industry-standard verification methodologies (UVM/OVM/VMM).
- Write and execute tests to verify design functionality, performance, and compliance with specifications.
- Work closely with design engineers to analyze and debug design issues.
- Develop and maintain verification environments and infrastructure.
- Contribute to the development and improvement of verification methodologies and processes.
- Mentor junior verification engineers and contribute to their technical growth.
Requirements:
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree preferred).
- 4+ years of experience in mixed-signal IC design verification.
- Expertise in Verilog, SystemVerilog, and scripting languages (Python, Perl, TCL).
- Strong understanding of analog and digital circuit design principles.
- Experience with Cadence simulation tools (AMS-designer) or similar.
- Expertise in Real Number Modelling.
- Familiarity with automotive quality standards (e.g., AEC-Q100) is desirable.
- Excellent communication, teamwork, and problem-solving skills.
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