Sr. ASIC Design Engineer

2 settimane fa


Parma, Italia VisLab (an Ambarella Inc. company) A tempo pieno

We’re growing Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer. Responsibilities Developing micro-architecture specifications for a next generation Computer Vision processor; Designing and implementing Verilog / SytemVerilog modules for cutting edge SOCs. Examples of such modules include : Video compression logic, Image processing logic, Vector processors and Device / Memory controllers; Design integration, logic synthesis, and design optimization for timing, area and power; Developing front-end methodologies and tool flows; Requirements Master’s degree in Electrical Engineering with 0-4 years of experience; Very good understanding of VLSI / ASIC design, Computer architecture and Logic design; Good knowledge and experience in using hardware description languages (Verilog / SystemVerilog); Ability to program in scripting languages, like Python and Perl; Knowledge of design verification, and functional coverage; Strong communication skills and a good team player; Knowledge of logic synthesis and timing closure is a must; Knowledge and / or experience in the areas of Image / Video processing, computer vision, machine learning are plus; To apply, please submit resume with subject : JOB#VLSI to or apply online on Ambarella website. As an Equal Opportunity / Aff… *Full text of the EEO statement retained from original* Please find at this link our privacy disclaimer dedicated to candidates data, accordingly to the GDPR : #J-18808-Ljbffr


  • Sr. Asic Design Engineer

    4 settimane fa


    Parma, Italia Ambarella A tempo pieno

    Overview We’re growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer. Responsibilities Developing micro-architecture specifications for a next generation Computer Vision processor; Designing and implementing video compression logic, image processing logic, and computer vision processors in Verilog and SystemVerilog; Design integration,...


  • Parma, Italia Ambarella A tempo pieno

    We’re growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer. Responsibilities: • Developing micro-architecture specifications for a next generation Computer Vision processor;• Designing and implementing video compression logic, image processing logic, and computer vision processors in Verilog and SystemVerilog;• Design integration,...


  • Parma, Italia VisLab (an Ambarella Inc. company) A tempo pieno

    We’re growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer. Responsibilities Developing micro-architecture specifications for a next generation Computer Vision processor; Designing and implementing Verilog / SytemVerilog modules for cutting edge SOCs. Examples of such modules include : Video compression logic, Image processing logic,...

  • Sr. ASIC Design Engineer

    3 settimane fa


    Parma, Italia VisLab A tempo pieno

    We’re growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer. Responsibilities: Developing micro-architecture specifications for a next generation Computer Vision processor; Designing and implementing Verilog/SytemVerilog modules for cutting edge SOCs. Examples of such modules include: Video compression logic, Image processing logic,...

  • Sr. ASIC Design Engineer

    3 settimane fa


    Parma, Italia VisLab (an Ambarella Inc. company) A tempo pieno

    We're growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer. Responsibilities: Developing micro-architecture specifications for a next generation Computer Vision processor; Designing and implementing Verilog/SytemVerilog modules for cutting edge SOCs. Examples of such modules include: Video compression logic, Image processing logic, Vector...

  • Sr. ASIC Design Engineer

    3 settimane fa


    Parma, Italia VisLab (an Ambarella Inc. company) A tempo pieno

    We’re growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer. Responsibilities: Developing micro-architecture specifications for a next generation Computer Vision processor; Designing and implementing Verilog/SytemVerilog modules for cutting edge SOCs. Examples of such modules include: Video compression logic, Image processing logic,...

  • Sr. ASIC Design Engineer

    3 settimane fa


    Parma, Italia VisLab (an Ambarella Inc. company) A tempo pieno

    We're growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer. Responsibilities: Developing micro-architecture specifications for a next generation Computer Vision processor; Designing and implementing Verilog/SytemVerilog modules for cutting edge SOCs. Examples of such modules include: Video compression logic, Image processing logic, Vector...

  • Sr. ASIC Design Engineer

    3 settimane fa


    Parma, Italia VisLab A tempo pieno

    We're growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer. Responsibilities: Developing micro-architecture specifications for a next generation Computer Vision processor; Designing and implementing Verilog/SytemVerilog modules for cutting edge SOCs. Examples of such modules include: Video compression logic, Image processing logic, Vector...

  • Sr. ASIC Design Engineer

    3 settimane fa


    Parma, Italia VisLab (an Ambarella Inc. company) A tempo pieno

    We’re growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer. Responsibilities: Developing micro-architecture specifications for a next generation Computer Vision processor; Designing and implementing Verilog/SytemVerilog modules for cutting edge SOCs. Examples of such modules include: Video compression logic, Image processing logic,...


  • Parma, Italia VisLab (an Ambarella Inc. company) A tempo pieno

    We're growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer. Responsibilities: Developing micro-architecture specifications for a next generation Computer Vision processor; Designing and implementing Verilog/SytemVerilog modules for cutting edge SOCs. Examples of such modules include: Video compression logic, Image processing logic, Vector...