FPGA Engineer
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Location:
Gorgonzola, ItalyThales people architect solutions that are relied upon to deliver operational advantage at every decisive moment throughout the mission. Defence and armed forces customers rely on us to deliver the full range of defensive systems for land, sea, and air. From early warning, to threat neutralisation, our platforms cover all levels from very short-range systems, to extended protection across the entire battle-space including Airspace Mobility Solutions, Vehicles and Tactical Systems and Missile Defence, Optronics, and Radar.
Gorgonzola hosts Navigations Air Systems (NAS) domain. The activity of NAS domain: avionics, navigation and radar systems for civil air traffic and technologies supporting the activities of civilian and military pilots, ATC controllers and technicians of several airlines, air traffic control agencies and Air Force around the world. Italy is the Group’s Competence center for the design, production and delivery of Navigation Aids products and Competence Centre for the delivery of non-Radar Surveillance Products.
Thales people architect solutions that enable two-thirds of planes to take off and land safely. Our Ground Navigation portfolio offers a complete range of products which includes the latest generation of ILS, DME, VOR and TACAN systems. With more than 7,000 Navigation aids and landing systems installed worldwide in 172 countries, we are leading the Navaids market.
The second product line of NAS is Non-Radar Surveillance (NRS) with an installed base of more than 2.200 ADS-B and MLAT ground stations.
We are currently looking for an FPGA Engineer to join Thales Land and Air Systems in its Navaids Center of Competence Gorgonzola (near Milan).
Technically responsible for complex boards design and its consistency with the solution, the HW Engineer coordinates with the solution Engineering Manager and PDA in order to make sure that the top down refinement of the solution is consistent with the hardware strategy and constraints including COTS selection and components reuse.
Key Responsibilities
and Tasks:
Experience needed:
Experience in Telecommunications design and/or SDR architectures Experience with complete design FPGA flows involving timing closure of high-speed digital design using scripting languages and design automation Solid knowledge of Xilinx (both ISE and Vivado) and Microsemi architectures and tools Previous experience in DO254 designs and compliance verification is a plus Hands-on experience with C/C++ applications development, multi tasks applications, tasks scheduling and inter-tasks communication is a plus Hands-on experience with real-time systems is a plusCommunication:
Strong communication skills required, including the ability to clearly express technical concepts in verbal and written forms across different management levels. Ability to work in team. Taste for international contacts. Manifest the flexibility needed to be integrated in the different stages of a project. Technical leadership – with ability to build and sustain good working relationships with staff, peers and managers, customers and other stakeholders.
Skills and
Qualifications: