Senior Design Verification Engineer

3 giorni fa

Rome, Italia Altro A tempo pieno

Senior Design Verification Engineer - RomeI am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting‑edge SoC designs that will shape the future of AI, HPC, and other advanced technologies.Required Skills & ExperienceMaster’s degree in a relevant field.Proven experience in 3 successful tapeouts.Expertise in UVM / System Verilog.Experience with Formal Verification.Experience with scripting languages such as Python, Perl or Bash.Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential.This Senior Verification Engineer role offers a unique opportunity to contribute to game‑changing semiconductor technology, with the flexibility of a hybrid working model in either Ghent, Barcelona or Rome.Email: Tel: LinkedIn:

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