Senior Engineer, Digital Design Engineering

24 ore fa

catania, sicily, Italia Analog Devices Tempo pieno

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Senior Digital Design Engineer

Responsibilities

This position will involve many of the following tasks.

FPGA prototyping of design

Development of models &self checkingmechanisms for FPGA

HW & S/W Codesign

Architectural design and specification of blocks.

Verilog/SystemVerilogRTL design

Interaction withcustomerand stakeholders

Design to meet timing, area, low-power, DFT, manufacturing test and timing targets for market

All aspects of design workincludinginteraction with verification and analog team.

Interaction withimplementationteam to convert RTL to silicon. Defining timing constraints and performing static timing analysis

Working with architecture and design teams todeterminefunctionality protocols

Qualifications

Bachelor's or Master'sdegree, in Engineering (Electronic Engineering) or equivalent 

Architectural design and specification of complex systems, especially in system on chip with processors. 

Deep knowledge of FPGA development flow

FPGA modelling

Verilog/SystemVerilog RTL design - with emphasis on AHB, AXI protocols and processor architecture on ARM cores. 

Design to meet timing, area, low-power, manufacturingtestand timing targets for market. 

All aspects of design workincludinginteraction with verification and analog team. 

Interaction withimplementationteam to convert RTL to silicon. 

Working with architecture and design teams todeterminefunctionality protocols 

Ability to work well in a diverse team environment 

Strong interpersonal,teamworkand communication skills arerequired. 

Precise documentation and attention to detail are essential. 

Quick to adoptnew technologies

Ability to work well in a diverse team environment 

Strong interpersonal,teamworkand communication skills arerequired. 

Be self-motivated and enthusiastic. 

Goodproblem solvingskills. 

Architected design and specification of blocks and platforms. 

Act as design hub to interact with stakeholders – test, application, physical implementation, verification 

Design to meet area, low-power, manufacturingtestand timing targets. 

Intellectual Property (IP) block design and integration. 

Perform timing,powerand CDC analysis on design 

Verification of blocks using UVM. 

Mixed-signal integration and verification / co-simulation 

Working with product development teams to align digital system architecture and methodologies with product roadmap 

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Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days

Senior Engineer, Digital Design Engineering

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