Staff Silicon Design Engineer

What You Do At AMD
At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems.
Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary.
When you join AMD, you’ll discover the real differentiator is our culture.
We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives.
Join us as we shape the future of AI and beyond.
Team Overview
The AMD Ser Des Team is hiring for a Staff Level Analog Circuit Design Engineer to work on Ser Des products up to 200+ Gbps on the latest CMOS Fin FET nodes.
The team has extensive experience in the design of circuits for high‑speed transmission and recovery of data over wired links, including:
High‑speed (100 GSps+) data converters for signal recovery (ADC) and transmit signal conditioning (DAC)
Continuous‑time equalizers with programmable gain and B/W up to 60 + GHz
Wide‑range, low‑noise PLLs operating up to 20 + GHz
Injection‑locked oscillators for multi‑phase clock generation
High‑speed clock distribution and correction circuits
Custom digital circuits for data serialization
High‑speed wired channel termination and driver circuits
The Role
The role requires development of high‑speed and high‑performance analog circuits at the lowest power possible.
Candidates are expected to have extensive experience in the design and verification of analog circuits and systems, and be familiar with layout floorplanning, layout‑dependent effects and post‑layout verification.
The Person
You have a passion for high‑speed analog circuit design and verification.
You are a team player with excellent communication skills and experience collaborating with engineers at different sites/timezones.
You have strong analytical and problem‑solving skills and are willing to learn and ready to take on problems.
Key Responsibilities
Analog circuit design of various circuits related to Ser Des PHY development to meet block‑level design specifications
Verification of circuit designs to ensure functional, performance and reliability targets are achieved using industry standard tools and methodologies.
Regular presentation and sharing of design progress with peers
Participation in design reviews of other circuits to identify potential issues and for learning.
Communication with Ser Des circuit team members at other sites to share ideas.
Feed back circuit performance information to the architecture team for system modelling.
Support of the system‑level verification team in modelling of analog circuits in Verilog and debugging of identified issues.
Assist with silicon bring‑up and debug.
Preferred Experience
Good analog circuit design and analysis skills
Experience with industry standard schematic entry and circuit simulation tools and methodologies
Good programming/scripting skills
Familiarity with the impact of layout effects on circuit design
Experience with circuit floorplanning
Previous experience in high‑speed circuit design would be a benefit
Experience in silicon debug, verification and characterization
Good interpersonal/teamwork skills
Academic Credentials
Bachelors or Masters degree in Electronic/Electrical Engineering
Equal Employment Opportunity Statement
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services.
AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.
We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
#J-18808-Ljbffr