Principal HS Digital Place
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Your tasks
- Technical expert and recognized authority for physical implementation of high-speed digital and mixed-signal ICs
- Lead place-and-route implementation from synthesis results through PnR to sign-off and tape-out
- Define, deploy, and maintain digital backend methodologies, flows, and best practices
- Drive timing closure, power, performance, area (PPA), signal integrity, EM/IR and physical verification strategies
- Mentor and develop engineers within the digital backend community
- Lead EDA tool evaluations, methodology improvements, and flow automation initiatives
- Support technology enablement for advanced CMOS nodes including FinFET and FD-SOI
- Provide technical leadership across multiple projects and business units
- Act as interface to foundries, EDA vendors, and methodology teams
- Drive continuous improvement of backend design efficiency and quality
Who we are looking for
- MSc or PhD in Electrical Engineering, Microelectronics, or related field
- 10+ years of experience in digital physical implementation and backend design
- Proven expertise with industry-standard physical design tools and flows (Cadence EDA flow preferred)
- Strong knowledge of floorplanning, placement, CTS, routing, STA, physical verification, power integrity, and signal integrity analysis
- Extensive experience with timing closure and sign-off methodologies
- Experience with high-speed interfaces such as UCIe, PCIe, DDR, SerDes, USB, MIPI, or similar protocols is highly desirable
- Experience driving methodology development and engineering best practices across multiple projects
- Strong communication, collaboration, mentoring, and technical leadership skills
- Ability to work independently and influence technical decisions at organizational level
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