SoC Physical Design Engineer – Hybrid Work, 3nm+ ASICs

In this role you drive the architecture, design and validation of ASICs for optical modules within Nokia's Optics Subsystems. You will work in an international SoC team to push higher transmission bandwidth while reducing power and size. You’ll translate standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis,...

Nokia in Bari, Puglia is seeking a SoC Physical Design Engineer to drive floorplanning, placement, routing, and timing closure for cutting-edge Optical Network ASICs. You will translate RTL to GDSII, optimize power, performance and area, and collaborate with logic/design teams on feasibility and trade-offs. The role demands 3+ years in ASIC physical design...

In this role, you will implement physical design for Optical Network ASICs across cutting-edge nodes, focusing on power, performance, and area. You will work within a hardware/RTL team to translate designs into silicon and optimize flows for submicron processes. You’ll tackle floorplanning, placement, routing, and timing closure, shaping multi-project IP...

In this role you drive the architecture, design and validation of ASICs for optical modules within Nokia's Optics Subsystems. You will work in an international SoC team to push higher transmission bandwidth while reducing power and size. You’ll translate standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis,...