Principal Analog Design Engineer

Descrizione dell'offerta di lavoroPrincipal Analog Design EngineerLocation: Pavia, Italy • Salary: €85,000 to €110,000 + Bonus +SIGNING BONUS+ Paid RelocationThis role is a key position within ourOptical PHY (CE-OPHY) team, which is part of our Central Engineering division.Our team is at the forefront of designing high-speed and optical transceivers for modern communication infrastructure.This technology is critical for addressing the explosive demand for bandwidth in mega data centers that power social media, video-on-demand, gaming, and other real-time data streams.We are dedicated to developing innovative, first-to-market chips and subsystem solutions that push the boundaries of data rates and power efficiency.Key ResponsibilitiesAs a Senior Principal Analog Design Engineer, you will be a technical leader responsible for the complete design cycle of complex analog circuits.Your primary responsibilities will include:Design & Architecture:You will analyze and interpret block specifications, taking ownership of transistor-level design and selecting the most appropriate topologies.This role involves designing entire analog macros or IPs from initial concept to final mass production.Verification & Validation:You will be responsible for modeling and validating circuit blocks.A crucial part of your role will be to supervise and guide layout activities, providing clear guidelines and conducting rigorous post-layout verifications to ensure design integrity.Collaboration & Leadership:This is a highly collaborative role.You will work closely with other engineering teams to enhance existing solutions and participate in cross-functional meetings.A key expectation is to train and mentor junior designers, helping to build the team's collective expertise and technical strength.Project Management:You will manage both pre-silicon tasks, such as simulation and modeling, and post-silicon tasks, including lab characterization, debugging, and correlating measurements to simulations, all the way to high-volume production.Candidate ProfileWe are seeking a seasoned engineer with a deep background in analog IC design and a passion for pushing technological limits.Education & Experience:A Master's degree or Ph.D. in Electrical Engineering or a related field is required, along with ***** years of professional experience.Technical Skills:You must have proven experience in designing ICs from the architecture definition phase through to lab characterization and volume production.Solid experience in analog design, preferably in the multi-GHz range, is a must.Proficiency in supervising custom analog layout, using standard EDA CAD tools, and debugging designs to correlate simulations with measurements is essential.Preferred Qualifications:Experience with multi-Gbps electrical SerDes or electro-optical transceivers is highly desirable.Knowledge of advanced CMOS nodes, including FinFET, would also be a significant advantage.Personal Skills:You should possess strong communication, presentation, and documentation skills.Given our international team and location, proficiency in both written and spoken Italian and English (at a minimum B2 level) is required.Work Model:This is an on-site, full-time position located inPavia, Italy.Privacy and data usageNoi e i nostri 1 partner archiviamo e accediamo ai dati personali, come i dati di navigazione e identificatori univoci, sul tuo dispositivo.Selezionando Accetto, abiliti le tecnologie di tracciamento affinché supportino gli scopi mostrati alla voce "Noi e i nostri partner trattiamo i dati da fornire".Selezionando Rifiuta tutti o revocando il tuo consenso, le disabiliti.Nel caso in cui queste tecnologie dovessero essere disabilitate, alcuni contenuti e annunci visualizzati potrebbero non essere rilevanti.Puoi accedere nuovamente a questo menu per modificare le tue scelte o per revocare il consenso facendo clic sul link Mostra finalità in fondo alla pagina web.[o l'icona mobile in basso a sinistra della pagina web, se applicabile].Tali scelte avranno effetto nel contesto del nostro Sito web.Per maggiori informazioni, consulta l'Informativa sulla privacy.Trattamento dei datiNoi e i nostri partner trattiamo i dati per fornire: utilizzare dati di geolocalizzazione precisi, scansione attiva delle caratteristiche del dispositivo ai fini dell'identificazione, archiviare informazioni su dispositivo e/o accedervi, pubblicità e contenuti personalizzati, misurazione delle prestazioni dei contenuti e degli annunci, ricerche sul pubblico, sviluppo di servizi.#J-*****-Ljbffr