Principal Digital Ic Design Engineer

2 settimane fa

Milano, Italia Jobbit A tempo pieno

Michael PageMain Mission and Focus of Principal Digital IC Design Engineer (IPs) :Define and implement a unified methodology for IP and subsystem development.Establish a consistent design process flow across design teams and sites.Deploy new practices and ensure methodology adoption across departments.Lead technical activities and contribute directly to ongoing design projects.KEY RESPONSIBILITIESDrive improvements in design methodology, flow, and quality to ensure robust and efficient IP and module development.Lead project activities and mentor less experienced engineers.Architect, specify, implement, simulate, and benchmark digital control peripherals, MCU/DSP systems, and hardware accelerator IPs.Collaborate closely with product integration teams to define requirements and guide successful implementation.Support teams in adopting and refining design methodologies and processes across multiple sitesCandidate Profile for Principal Digital IC Design Engineer (IPs) :+10 years' experience in IC design and design methodology.Exposure to multiple company environments (ideally three or more), bringing diverse process and workflow insights.Strong background across front-end to mid/back-end IC design flows.Demonstrated ability to establish, scale and embed methodologies within complex design organisations.QualificationsMS or PhD in Electrical Engineering, Semiconductors or related.Strong awareness of design quality and experience driving DFMEA, design releases, and methodology improvements.Expertise with digital control peripherals, MCU/DSP systems and hardware accelerator IPs.RTL design expereince.Skills in project leadership.Desirable SkillsKnowledge of RTL to GDS flow, including logic synthesis, place-and-route, STA, and power analysis.Experience in the design of signal processing components.Familiarity with advanced digital verification methodologies (e.g. UVM).Our client is a global leader inpower management, analog, sensing and discrete semiconductor technologies.Design office based in Neuchatel.Relocation assistanceHolidays: 25 days of annual leave.Seniority Days: Extra holidays after 5, 10, 15, and 20 years of service (+2, +3, +4, +5 days respectively).13th Month Salary: Paid in 12 monthly instalments plus an additional month's salary (half in June, half in December).Child Allowance: Monthly

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