Senior Mixed-Signal Silicon Engineer

Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.Come work at AmazonRoleAs Senior Mixed-Signal Silicon Engineer, you will engage with an experienced cross-disciplinary staff to conceive and design innovative product solutions.You will work closely with an internal inter-disciplinary team and third-party suppliers to drive key aspects of product definition, execution, and optimization.You must be responsive, flexible, and able to succeed within an open collaborative peer environment.As a member of the RFIC team, you will be responsible for the architectural definition, design, simulation, layout, and extracted simulation for transmit and receive mixed-signal circuit blocks including data converters and aspects of SERDES.Strong focus will be on creating power and cost optimized solutions for a given system performance.Export Control RequirementDue to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.Key Job ResponsibilitiesDesign & optimize high-speed (>800Msps) medium resolution (5-8 bits) DACs & ADCs and other analog/mixed-signal blocks in deeply scaled CMOS technologies.Explore circuit architectures for power/area/performance trade-offs.Perform circuit layout, parasitic extraction and simulation.Collaborate with cross-functional teams to define analog/digital interface requirements and define supporting digital functions.Specify bench and production test plans for your design and enable volume production.Basic QualificationsMaster's degree in Electrical or Communications Engineering or a related field.7+ years of experience in mixed-signal design, preferably in an advanced node.Experience in taking designs to volume production.Preferred Qualifications10+ years of experience in high-speed, low-power mixed-signal circuit design, layout and verification in FinFET, SOI, BiCMOS, and Bulk CMOS technologies.Knowledge of time-interleaved ADC architectures, digitally-assisted analog techniques.Proficient in modeling circuits using Matlab, Verilog-A.Knowledgeable in SERDES, data converter clock distribution design and jitter/phase noise concepts.Proficiency with digital and mixed signal simulators, for example Incisive/Xcelium, VCS, AMS Designer.Knowledge of the Cadence Virtuoso Design Framework, Virtuoso Schematic Editor, and Analog Design Environment (Explorer/Assembler).Knowledge of programming in Python, Perl, and SKILL.Effective written and verbal communication skills.Our compensation reflects the cost of labor across several US geographic markets.The base pay for this position ranges from $143,300/year in our lowest geographic market up to $247,600/year in our highest geographic market.Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience.Amazon is a total compensation company.Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits.For more information, visit .This position will remain posted until filled.Applicants should apply via our internal or external career site.Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.#J-*****-Ljbffr