Senior Lab Validation Engineer

2 giorni fa

Cava Manara, Lombardy, Italia Altro Tempo pieno

ams Italy S.r.l. is seeking a senior validation engineer to lead the bring-up and verification of RF, HF, analog, mixed-signal, and high-speed digital ICs in an onsite Lombardy setting.
You will develop validation plans, characterize performance across PVT, and drive root-cause analysis for silicon issues. Collaboration with cross-functional teams and mentoring junior engineers are essential to ensure first-silicon success.