Digital Design Engineer

6 giorni fa

Province of Monza and Brianza, Lombardy, Italia InvenSense Tempo pieno

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Overview

InvenSense seeks skilled engineers to design and verify advanced digital IPs for MEMS sensor products. You will collaborate with analog/MEMS teams to optimize sensor architectures and drive RTL-to-layout flows. You'll shape verification plans and support silicon bring-up, contributing to a cross-functional, high-precision product line. This role offers the chance to influence leading-edge sensor platforms and scale across automotive, consumer, and IoT markets.

Retribuzione / Benefits

Average RAL 60K–75K
Variable compensation up to 35%
9 meal vouchers
car parking or public transport pass
supplemental health insurance

Responsabilità

Design, verify via simulation, and validate digital IPs for sensor products
Collaborate with Analog/MEMS design engineers to define and optimize sensor architectures
Contribute to verification plans at IP and system levels
Drive the implementation flow from RTL to layout
Guide and support layout engineers for top-level physical design

Requisiti fondamentali

MSEE with 10+ years of ASIC design experience or PhD with 8+ years
Strong understanding of digital systems and micro-architecture trade-offs
Experience in design of digital macros in mixed-signal ASICs
Proficiency with logic synthesis, formal verification, DFT, STA, power analysis, ATPG, lint checks, cross-domain checks, RTL and gate-level simulations
Knowledge of low power digital design and DSP block design
Lab bench debugging and silicon bring-up experience
Knowledge of Matlab/Simulink for system modeling
Experience with FPGA prototyping flow and methodology
Excellent interpersonal, teamwork, and communication skills
Detail-oriented, proactive in process improvements and initiative-taking
Proven teamwork and analytical problem-solving skills
Excellent oral and written communication skills
Programming knowledge in Verilog/SystemVerilog, Perl/Python/Tcl, Makefile, and C++
interpersonal collaboration
teamwork
communication
Verilog/SystemVerilog
Perl/Python/Tcl scripting
C++

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