Senior Engineer, Analog Design Engineering

About Analog DevicesAnalog Devices, Inc.
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(NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge.
ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers.
With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible.
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The Consumer Group at ADI is exponentially expanding its activities and engagements, growing its battery power solutions to further complement its existing mixed-signal products, using 90nm and lower geometry, CMOS Analog Power Process technologies. The Business: ADI's Personal Electronics Solutions (PES) business has been a key provider of high-volume consumer silicon solutions for the last decade, developing key products that enable highly precise human interpretation and sensory assistance.
As part of a long sustainable growth plan, we are expanding our team, supporting the development of highly integrated power solutions and PMICs.
PES BU will present the successful candidate a great opportunity for continuous career development as part of a highly motivated and supportive worldwide engineering team. The Team: Personal Electronics Solutions (PES) Team is primarily focused on PMIC and hybrid mixed signal / power developments, for High-End / High-Volume electronic devices, such as Smartphones, Tablets and Consumer Accessories.
PES Milan Team is expanding its focus in Power Solutions, across a broad range of IC engineering profiles and levels of experience, including Analog Designer, Digital Designer, Mixed-Signal Designer, Verification Engineer, Validation Engineer and Layout Designer. The Position: Analog Devices, Inc.
is looking for a P3 – Senior Engineer to join our Team.
The candidate will be self-motivated, willing to learn exciting new technologies and develop new products, but also be able to work effectively within a talented group of individuals across multiple development locations.
The candidate will join a team of Analog, Digital, Mixed-Signal CMOS designers, Mask Layout designers, Verification and Validation engineers, Algorithm and Software developers, Packaging and Test engineers, implementing PMIC state of the art. The candidate will be involved in the following developments, from definition to production: LDO, BUCK, BOOST, BUCK-BOOST, CHARGE-PUMP, SIMO (Single-Input / Multiple Outputs), IBB (Inverted BUCK-BOOST)Oscillators, PLL, Bandgap, References, ADC, DAC, I/O, OTP, MTP, DFTResponsibilities: Power IP DevelopmentContribute to the definition and the design of complex Power IPsPower Management IC DevelopmentExecute on PMIC design, pre-silicon verification and post-silicon validationProvide guidance to physical design layout teamTechnical Customer Interface EngagementParticipate in customer engagements, in support of technical feasibilityIC Development Weekly meetings / IC Milestone WorkshopsHuman ResourcesEnable a culture of continuous learning and improvementSupport project management, task planning and scheduleMinimum Qualifications &

Experience:
Degree in Electrical Engineering, Computer Science, or Computer Engineering, with 3+ years of experienceIP Analog Design experienceSolid technical and analytical background, with good problem-solving skillsGood team worker with multi-disciplineGood understanding of Mixed-Signal Design Flow and Top-Down development methodologyGood understanding of Power IP TopologiesAnalog Functional and Parametric VerificationProcess

• Voltage
• Temperature (PVT) Corners, Layout Parameter Extraction (LPE) SimulationsGood written and verbal communicationPreferred Qualifications &
  
  Experience:
  Proficient with Cadence Suite (Virtuoso ADE Spectre)Scripting languagesHDL programming languages (Verilog / System Verilog)Analog Behavioral Models (Verilog-A, Verilog-AMS, Wreal, SystemVerilog, EEnet)Mixed-Signal Verification methodology and tools (AMS / APS / Flex)Experience in high-voltage low geometry process technologyLab silicon bring-up and Production Test support experiencesThe pay range for this position in Milan is 40,810 to 59,095.
  This range may change if you are hired in another location. The stated range may be inclusive of several levels within this role and will be narrowed during the interview process based on a number of factors, including the candidate's experience, qualifications, and specific location. Applicants interested in this role who are not located in the primary location may request the applicable pay range for their location during the interview process if an alternative location is an o