Senior Digital IC Design Engineer – RTL/Verilog, Edge AI
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NXP Semiconductors in Italy's Catania site is developing a new team to create high-impact MCUs and SOCs for edge AI. You will design digital sub-circuits, code RTL in Verilog/SystemVerilog, and contribute to verification, DFT, and post-silicon validation.
The role collaborates with analog, mixed-signal and software teams to define interfaces, optimize performance, and ensure power integrity, quality, and timely delivery in a team-driven environment.
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Catania, Sicilia, Italia NXP Semiconductors Tempo pieno 51.000 € - 70.000 € ContrattoNXP Semiconductors in Italy's Catania site is developing a new team to create high-impact MCUs and SOCs for edge AI. You will design digital sub-circuits, code RTL in Verilog/SystemVerilog, and contribute to verification, DFT, and post-silicon validation.The role collaborates with analog, mixed-signal and software teams to define interfaces, optimize...
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