Layout Engineer

4 giorni fa

Pavia, Italia Synopsys A tempo pieno

As a Layout Engineer you will collaborate in the development of advanced analog integrated circuit designs using best-in-class Synopsys suite of tools. You will be working with local and global teams in developing layout for complex mixed-signal designs in the latest technology nodes. In your role you will be accountable for block ownership with technical understanding and skills. As a member of our team, you will be developing IP in various technology nodes and foundries for different customers in a fast paced and exciting design environment.

Main Responsibilities:
  • Resolve a wide range of issues in creative ways
  • Exercise judgment and partner with others in selecting methods and techniques to obtain solutions
  • Contribute to complex aspects of a project
  • Work in a collaborative way
  • Provide regular updates to manager on design status
  • Network with senior internal and external personnel in own area of expertise
Key Requirements:
  • Bachelor's degree in the relevant field
  • Basic familiarity with layout of analog and mixed signal CMOS circuits
  • Good knowledge in electronics
  • Familiarity with CAD environments
  • Proven understanding of MS Office Suite and SharePoint
Nice to have:
  • Previous experience in development of layout
  • Exposure to scripting (ie. TCL, PERL, Python, etc…)

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

#J-18808-Ljbffr

  • Layout Engineer

    4 settimane fa

    Pavia, Italia Synopsys A tempo pieno

    As a Layout Engineer you will collaborate in the development of advanced analog integrated circuit designs using best-in-class Synopsys suite of tools. You will be working with local and global teams in developing layout for complex mixed-signal designs in the latest technology nodes. In your role you will be accountable for block ownership with technical...

  • Layout Engineer

    4 settimane fa

    Pavia (PV), Italia Synopsys A tempo pieno

    As a Layout Engineer you will collaborate in the development of advanced analog integrated circuit designs using best-in-class Synopsys suite of tools. You will be working with local and global teams in developing layout for complex mixed-signal designs in the latest technology nodes. In your role you will be accountable for block ownership with technical...

  • Layout Design, Sr Staff Engineer

    2 mesi fa

    Pavia, Italia Synopsys A tempo pieno

    As Layout Design Sr Staff Engineer you will contribute in the development of advanced analog integrated circuit designs using best-in-class Synopsys suite of tools. You will be working with local and global teams in developing layout for complex mixed-signal designs in the latest technology nodes.In your role you will be responsible for taking on top-level...

  • Analog Layout Intern

    3 mesi fa

    Pavia, Italia Marvell A tempo pieno

    About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire...

  • Lab IC Verification Engineer

    2 settimane fa

    Pavia, Italia Ams Osram A tempo pieno

    defaultResponsibilities:Support design team during development phase concerning requirements for adequate testability in labCharacterization and debug of ICsInvestigation and analysis of possible unexpected test results interacting with the Design teamDesign and layout of PCB board for electrical evaluation of ICTesting methodology and setup definition using...

  • Lab IC Verification Engineer

    2 settimane fa

    Pavia, Italia ams Italy S.r.l. A tempo pieno

    Responsibilities:Support design team during development phase concerning requirements for adequate testability in labCharacterization and debug of ICsInvestigation and analysis of possible unexpected test results interacting with the Design teamDesign and layout of PCB board for electrical evaluation of ICTesting methodology and setup definition using...

  • Lab IC Verification Engineer

    1 mese fa

    Pavia, Italia Ams Osram A tempo pieno

    defaultResponsibilities:Support design team during development phase concerning requirements for adequate testability in labCharacterization and debug of ICsInvestigation and analysis of possible unexpected test results interacting with the Design teamDesign and layout of PCB board for electrical evaluation of ICTesting methodology and setup definition using...

  • Lab IC Verification Engineer

    1 mese fa

    Pavia, Italia ams Italy S.r.l. A tempo pieno

    Responsibilities:Support design team during development phase concerning requirements for adequate testability in labCharacterization and debug of ICsInvestigation and analysis of possible unexpected test results interacting with the Design teamDesign and layout of PCB board for electrical evaluation of ICTesting methodology and setup definition using...

  • Lab IC Verification Engineer

    2 settimane fa

    Pavia, Italia Ams Osram A tempo pieno

    defaultResponsibilities:Support design team during development phase concerning requirements for adequate testability in labCharacterization and debug of ICsInvestigation and analysis of possible unexpected test results interacting with the Design teamDesign and layout of PCB board for electrical evaluation of ICTesting methodology and setup definition using...

  • Lab Ic Verification Engineer

    4 settimane fa

    Pavia, Italia Ams Osram A tempo pieno

    default Responsibilities: Support design team during development phase concerning requirements for adequate testability in lab Characterization and debug of ICs Investigation and analysis of possible unexpected test results interacting with the Design team Design and layout of PCB board for electrical evaluation of IC Testing methodology and setup...

  • Lab IC Verification Engineer

    1 mese fa

    Pavia, Italia Ams Osram A tempo pieno

    defaultResponsibilities:Support design team during development phase concerning requirements for adequate testability in labCharacterization and debug of ICsInvestigation and analysis of possible unexpected test results interacting with the Design teamDesign and layout of PCB board for electrical evaluation of ICTesting methodology and setup definition using...

  • Lab Ic Verification Engineer

    4 settimane fa

    Pavia, Italia Ams Italy S.R.L. A tempo pieno

    Responsibilities: Support design team during development phase concerning requirements for adequate testability in lab Characterization and debug of ICs Investigation and analysis of possible unexpected test results interacting with the Design team Design and layout of PCB board for electrical evaluation of IC Testing methodology and setup definition using...

  • Senior Analog Design Engineer

    4 settimane fa

    Pavia, Lombardia, Italia Synopsys A tempo pieno

    Are you an expert in analog integrated circuit design looking for a new challenge? We have an exciting opportunity for a Senior Analog Design Engineer to join our team at Synopsys.Job Description:We are seeking a highly skilled and experienced Analog Design Engineer to collaborate with our cross-functional teams in developing advanced analog integrated...

  • Lab IC Verification Engineer

    4 settimane fa

    Pavia (PV), Italia Ams Osram A tempo pieno

    default Responsibilities: Support design team during development phase concerning requirements for adequate testability in lab Characterization and debug of ICs Investigation and analysis of possible unexpected test results interacting with the Design team Design and layout of PCB board for electrical evaluation of IC Testing methodology and setup...

  • Lab IC Verification Engineer

    2 settimane fa

    Pavia (PV), Italia Ams Osram A tempo pieno

    default Responsibilities: Support design team during development phase concerning requirements for adequate testability in lab Characterization and debug of ICs Investigation and analysis of possible unexpected test results interacting with the Design team Design and layout of PCB board for electrical evaluation of IC Testing methodology and setup...

  • Lab IC Verification Engineer

    4 settimane fa

    Pavia (PV), Italia ams Italy S.r.l. A tempo pieno

    Responsibilities: Support design team during development phase concerning requirements for adequate testability in lab Characterization and debug of ICs Investigation and analysis of possible unexpected test results interacting with the Design team Design and layout of PCB board for electrical evaluation of IC Testing methodology and setup definition...

  • Senior Analog Design Engineer

    24 ore fa

    Pavia, Lombardia, Italia Synopsys A tempo pieno

    We're seeking a seasoned Senior Analog Design Engineer to join our team in developing high-speed analog integrated circuits.Main Responsibilities:Investigate and develop circuit architectures that address architectural bottlenecks, driving improvements in power, area, and performance targets.Oversee physical layout to minimize the effects of parasitics,...

  • Analog Design, Staff Engineer

    1 mese fa

    Pavia, Italia Synopsys A tempo pieno

    We're looking for an Analog Design Engineer, Staff to join our team. Does this sound like a good role for you?In this role, you will work on the design, development, and refinement of Multi-Gbps PAM4 SERDES IP. You will be part of a fast-growing analog and mixed signal R&D team, developing high speed analog integrated circuits in the latest FinFET process...

  • Analog Design, Staff Engineer

    4 giorni fa

    Pavia, Italia Synopsys A tempo pieno

    We're looking for an Analog Design Engineer, Staff to join our team. Does this sound like a good role for you?In this role, you will work on the design, development, and refinement of Multi-Gbps PAM4 SERDES IP. You will be part of a fast-growing analog and mixed signal R&D team, developing high speed analog integrated circuits in the latest FinFET process...

  • Analog Design Engineer

    2 mesi fa

    Pavia, Italia Inventvm Semiconductor A tempo pieno

    From Master Thesys or PhD sponsorship to taking the next step forward in your career: if you are interested in learning more, send your resume to careers@inventvm.com INVENTVM is actively seeking a Senior Analog Design Engineer to design audio and/or power management circuit blocks using state-of-the-art IC design methodologies and design flows....