Digital Verification Engineer, Principal

4 settimane fa


Bardi, Emilia-Romagna, Italia Synopsys A tempo pieno

Job Summary: Synopsys is seeking an experienced digital verification engineer to join our team.

Main Responsibilities:
• Write modular constrained-random Verilog and System Verilog testbenches.
• Perform functional coverage, assertion coverage, and code coverage.
• Create and track test-plans.
• Evaluate failure cases and run gate-level simulations.

Key Qualifications:
• BSEE or MSEE with 15+ years of digital verification experience in the industry.
• Hands-on experience in writing complex testcases in Verilog and System Verilog.
• Familiarity with code quality metrics and Agile development methodologies.

About Synopsys:
Synopsys is at the heart of innovations that change the way we work and play. We power the Era of Smart Everything with the world's most advanced technologies for chip design and software security. Our Silicon IP business integrates more capabilities into an SoC—faster. We offer the world's broadest portfolio of silicon IP, including logic, memory, interfaces, analog, security, and embedded processors. Our products help customers integrate more capabilities, meet unique performance, power, and size requirements, and get differentiated products to market quickly with reduced risk.



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