SoC Physical Design Engineer: Floorplanning, Timing

In this role, you will implement physical design for Optical Network ASICs across cutting-edge nodes, focusing on power, performance, and area. You will work within a hardware/RTL team to translate designs into silicon and optimize flows for submicron processes. You’ll tackle floorplanning, placement, routing, and timing closure, shaping multi-project IP...

Overview In this role, you will implement physical design for Optical Network ASICs across cutting-edge nodes, focusing on power, performance, and area. You will work within a hardware/RTL team to translate designs into silicon and optimize flows for submicron processes. You'll tackle floorplanning, placement, routing, and timing closure, shaping...

Nokia seeks an experienced ASIC physical design engineer to implement floorplanning, place & route, and power/clock distribution for submicron nodes. You will work with a hardware/RTL team to translate designs into silicon and optimize flows. This role emphasizes collaboration across cross-functional teams, verification rigor, and automation, with...

In this role, you will implement physical design for Optical Network ASICs across cutting-edge nodes, focusing on power, performance, and area. You will work within a hardware/RTL team to translate designs into silicon and optimize flows for submicron processes. You’ll tackle floorplanning, placement, routing, and timing closure, shaping multi-project IP...

In this role, you will implement physical design for Optical Network ASICs across cutting-edge nodes, focusing on power, performance, and area. You will work within a hardware/RTL team to translate designs into silicon and optimize flows for submicron processes. You'll tackle floorplanning, placement, routing, and timing closure, shaping multi-project...

La Fondazione Chips-IT a Cascina Priora cerca un Principal Physical Design Engineer per guidare lo sviluppo di SoC avanzati.È la persona giusta per questa opportunità? Si assicuri di leggere la descrizione completa qui sotto.Il candidato ideale avrà esperienza significativa nei flussi di design fisico e utilizzerà strumenti EDA standard del settore.Il...

ams OSRAM in Cascina Priora, Italy, seeks a skilled engineer for digital physical implementation in complex integrated circuits.Qualsiasi informazione aggiuntiva su questo lavoro è disponibile nel testo sottostante. Si assicuri di leggere attentamente, quindi invii la sua candidatura.Ideal candidates must hold a Master's degree in Electronics or related...

Technical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC productsLead RTL development and integrationDrive design reviews and quality standardsSupport verification and implementation teamsMSc or PhD in Electrical Engineering10+ years digital IC design experienceHigh-speed...

Technical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC productsLead RTL development and integrationDrive design reviews and quality standardsSupport verification and implementation teamsWho we are looking forMSc or PhD in Electrical Engineering10+ years digital IC design...