Design Verification Engineer
3 giorni fa
Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world.Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems.At the core of our mission lies a culture of innovation.We challenge boundaries to solve some of the world's most critical problems.We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way.As Design Verification Engineer, you will join leading-edge team responsible for the verification of advanced interconnect systems in state-of-the-art microprocessors.This role focuses on ensuring the functionality, performance, and reliability of high-bandwidth data communication architectures.We are looking for someone who has a passion for modern, complex processor architecture, digital design, and verification in general.Who are a team player and has good communication skills, strong analytical and problem-solving skills and willing to learn and ready to accept challenges.ResponsibilitiesPerform pre-Silicon Verification of next generation high performance Microprocessor designs and related IPsDevelop, document and execute on verification test plans at unit level of design hierarchyDevelop high level language testbench components including stimulus drivers, behavioral models, monitors and checkers in SystemVerilogDevelop, simulate and debug directed/random stimulus to ensure design functionality according to specificationsSkillsMust haveMinimum of 5 years experience in Digital Design VerificationStrong skills with System Verilog and UVM.Good skills with VerilogExposure to both maintaining an existing Verification Environment as well as creating one from scratchExperience with functional verification tools by VCS, Cadence, Mentor GraphicsExperience working in a Unix/Linux environmentGood scripting skills (Perl, Shell, Ruby)Nice to haveProven experience of working with complex designs (not just I2C and other similar designs) would be an assetGood computer architecture, cache coherency knowledge would be an assetExposure to simulation profile, efficiency improvement, acceleration would be an assetExposure to leadership or mentorship would be an asset
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Senior Design Verification Engineer
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Lazio, Italia Ic Resources A tempo pienoSenior Design Verification Engineer - Rome I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation.This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other advanced...
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Senior Design Verification Engineer
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Lazio, Italia Ic Resources A tempo pienoSenior Design Verification Engineer - RomeI am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation.This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge So C designs that will shape the future of AI, HPC, and other advanced...
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Lazio, Italia Luxoft A tempo pienoSenior Design Verification Engineer - Data Fabric Systems As Design Verification Engineer, you will join a leading-edge team responsible for the verification of advanced interconnect systems in state-of-the-art microprocessors.This role focuses on ensuring the functionality, performance, and reliability ofores high-bandwidth data communication...
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Senior Design Verification Engineer
24 ore fa
Lazio, Italia Luxoft A tempo pienoSenior Design Verification Engineer - Data Fabric SystemsAs Design Verification Engineer, you will join a leading-edge team responsible for the verification of advanced interconnect systems in state-of-the-art microprocessors.This role focuses on ensuring the functionality, performance, and reliability ofores high-bandwidth data communication...
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Senior Design Verification Engineer
3 giorni fa
Lazio, Italia Luxoft A tempo pienoWe are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world.Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems.At the core of our mission lies a...
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Senior Design Verification Engineer
3 giorni fa
Lazio, Italia Luxoft A tempo pienoWe are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems.At the core of our mission lies a...
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Design Verification Engineer
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Lazio, Italia Luxoft A tempo pienoDesign Verification Engineer – Data Fabric Systems (Relocation to Romania)2 days ago – Be among the first 25 applicantsGet AI-powered advice on this job and more exclusive features.Position requires relocation to Romania.We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world.Our...
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Design Verification Engineer
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Lazio, Italia Luxoft A tempo pienoDesign Verification Engineer – Data Fabric Systems (Relocation to Romania)2 days ago – Be among the first 25 applicantsGet AI-powered advice on this job and more exclusive features.Position requiresrelocation to Romania.We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world.Our mission...
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Senior Formal Verification Engineer
2 settimane fa
Lazio, Italia Openchip & Software Technologies A tempo pienoAs a Senior Formal Verification Engineer, you will contribute to defining and leading the formal verification strategy for our systems.ResponsibilitiesWork closely with system architects and design team to establish formal verification environment and settingGuide the use of formal verification that correct formal techniques are used appropriately to improve...
