Senior Ams Verification Engineer

6 giorni fa


Lazio, Italia Analog Devices A tempo pieno

About Analog Devices Analog Devices, Inc. (NASDAQ : ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge.ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world.With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's PossibleTM.Position OverviewWe are seeking an ambitious Senior AMS Verification Engineer to provide support to our Power Solution Group located at Analog Devices, Assago (Italy).The candidate will be self-motivated and will join an experienced verification team and work effectively within a group of Analog designers, Digital designers, DMS Verification Engineers, Test Engineers, and Application Engineers.The candidate will be involved from the definition phase, through Verification Plan creation and specification coverage, testbenches creation, top-level AMS simulations, reporting and sign-off of Automotive and Industrial Power products.ResponsibilitiesActively participate in Product Definition meetings to learn the device features and specifications and turn these into verification items.Verification Plan creation, coverage definition, AMD / DMS coverage partitioning to achieve full coverage of the device.Prepare the AMS Verification environment and support analog designers for top-level AMS simulations.Prepare SystemVerilog testbenches to fulfill spec coverage and operating scenarios.Coordinate meetings with designers and DMS Verification engineers to track the verification progress.RequirementsMSEE with 5+ years of relevant industry experience and a solid background in AMS Verification.Good knowledge of analog design for both linear and switching systems.Proficiency in SystemVerilog.UVM knowledge is a plus.Vmanager knowledge is a plus.Cadence Virtuoso design environment knowledge, including ADE, SimVision, and Xcelium platform knowledge.Analog blocks modeling in VerilogAMS and SystemVerilog.Good written and verbal communication skills (English).Strong documentation practices.Ability to carry out verification assignments with minimum supervision.Motivation to learn.Why you will like working at ADIWe place great value on individual judgment.We allow our employees the freedom to explore new ideas and the autonomy to determine how to best achieve business goals and objectives.We emphasize professional development and mentoring.Above all, we recognize that the personal goals of our employees and the company's goals are closely related and must support each other.Job Req Type: Experienced; Travel: Yes, 10% of the time; Shift Type: 1st Shift / Days#J-*****-Ljbffr



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