Design Verification Engineer
1 settimana fa
Design Verification Engineer - VLSI/ASIC/FPGA Hardware Experience:3 - 25 YearsLocation:Permanent Remote anywhere in the WorldContract Length:6 MonthsType:Full time contract (8 hrs/day) Overlap Hours: 4 hrs/day with PSTMandatory Skills:Overall - 5 years of experience.Minimum of 2 years of relevant experience in Hardware Design and/or Hardware Verification.Experience With One Or More On The List Below:ASICVLSIFPGASOCExperience with one or more on the list below:SystemVerilog developmentVerilog developmentTestbench development and/or verification.Good communication skills in English.LLM experience is not mandatory; however, the candidate should be fine to work as a LLM Engineer for Verilog.Must-Have:BS or MS degree in Electrical Engineering or related field.3-5 years of proven experience in hardware design development.Expertise in HDLs such as Verilog, SystemVerilog, VHDL, and SystemC.Expertise in scripting, front-end and verification workflows, and integrations within the hardware design environment.Expertise in UVM environments.Expertise in Formal Verification.Expertise in Lint process and refinement.Good communication skills in English.Job Description:We're searching for an exceptional hardware design Developer to play a pivotal role in using the hardware design platform to generate the training data to enhance enterprise LLMs' capabilities.This unique position offers the chance to directly contribute to the sophistication of enterprise LLMs, ensuring they operate with unparalleled efficiency and intelligence.Your Mission:Develop, configure, and customize the hardware design platform, utilizing it to generate vital training data for enterprise LLMs.Liaise with research teams to translate requirements into actionable data insights, directly impacting our LLMs' performance.Uphold the highest standards in coding, debugging, and documentation, ensuring the hardware design solutions are optimized for LLM training and benchmarking.Collaborate across teams to identify and prioritize needs, contributing to the LLMs' ability to understand and automate complex processes.We Need:BS or MS degree in Electrical Engineering or related field.3-5 years of proven experience in hardware design development.Expertise in HDLs such as Verilog, SystemVerilog, VHDL, and SystemC.Expertise in scripting, front-end and verification workflows, and integrations within the hardware design environment.Exceptional problem-solving, communication, and collaborative skills.Familiarity with ML and AI systems.Seniority levelMid-Senior levelEmployment typeContractJob functionEngineering and Information TechnologyIndustriesIT Services and IT Consulting#J-*****-Ljbffr
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Senior Design Verification Engineer
2 settimane fa
Lazio, Italia Ic Resources A tempo pienoSenior Design Verification Engineer - RomeI am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation.This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge So C designs that will shape the future of AI, HPC, and other advanced...
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Design Verification Engineer
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Lazio, Italia Altro A tempo pienoDesign Verification Engineer needed for digital chip SOCs for satellite communications.Requires experience in UVM and digital verification.
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Principal Engineer
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Lazio, Italia Analog Devices A tempo pienoAbout Analog Devices, Inc. (ADI)'s Trinamic motor and motion control products transform digital information into precise physical motion, enabling Industry 4.0 performance in applications such as advanced robotics, automation, medical prosthetics, 3D printing, and more.The ADI Trinamic motor control ICs represent complete, efficient, small-footprint...
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Senior Design Verification Engineer
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Lazio, Italia Ic Resources A tempo pienoPrincipal Recruitment Consultant at IC Resources - Semiconductor Engineering divisionI am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation.This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape...
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Principal Functional Verification Engineer
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Lazio, Italia Microtech Global Ltd A tempo pienoAbout the Role:We are seeking a Principal Verification Engineer to lead functional verification for complex So C/IP architectures.You will collaborate across architecture, design, physical implementation, and software teams, driving verification methodology, execution, and closure.Key Responsibilities:• Analyse system and architecture specifications to...
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Senior Formal Verification Engineer
5 giorni fa
Lazio, Italia Openchip & Software Technologies A tempo pienoAs a Senior Formal Verification Engineer, you will contribute to defining and leading the formal verification strategy for our systems.ResponsibilitiesWork closely with system architects and design team to establish formal verification environment and settingGuide the use of formal verification that correct formal techniques are used appropriately to improve...
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Functional Verification Engineer
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Lazio, Italia Openchip And Software Technologies Sl A tempo pienoRoleAs a Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level.Your work may involve high-level modelling UVM HW/SW Co-Debug Simulation Acceleration support.Key ResponsibilitiesReading and analysing the system...
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Principal Digital Verification Engineer
7 giorni fa
Lazio, Italia Altro A tempo pienoRole Overview As a Principal Digital Verification Engineer, you will lead the pre-silicon verification of complex IP blocks, subsystems, or SoCs for automotive and industrial applications, with a strong focus on electrification solutions.In addition to defining verification strategies and developing advanced test environments, you will coordinate and mentor...
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Senior Formal Verification Engineer...
2 giorni fa
Lazio, Italia Openchip & Software Technologies A tempo pienoAs a Senior Formal Verification Engineer, you will contribute to defining and leading the formal verification strategy for our systems.Responsibilities- Work closely with system architects and design team to establish formal verification environment and setting- Guide the use of formal verification that correct formal techniques are used appropriately to...
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Digital Verification Engineer
7 giorni fa
Lazio, Italia Analog Devices A tempo pienoAbout Analog DevicesAnalog Devices, Inc. (NASDAQ : ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge.ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change,...