Senior Ams Verification Engineer
5 ore fa
A leading semiconductor company located in Assago, Italy, is seeking a Senior AMS Verification Engineer with over 5 years of relevant experience.This role involves participating in product definition, creating verification plans, and preparing testbenches in SystemVerilog.The ideal candidate will have a strong background in AMS Verification and analog design, with proficiency in Cadence Virtuoso and a passion for continuous learning.Join a company that values individual judgment, professional development, and collaborative teamwork.#J-*****-Ljbffr
-
Senior Ams Verification Engineer
1 settimana fa
Lazio, Italia Analog Devices A tempo pienoAbout Analog Devices Analog Devices, Inc. (NASDAQ : ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge.ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change,...
-
Senior Design Verification Engineer
2 settimane fa
Lazio, Italia Ic Resources A tempo pienoPrincipal Recruitment Consultant at IC Resources - Semiconductor Engineering divisionI am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation.This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape...
-
Senior Formal Verification Engineer
7 giorni fa
Lazio, Italia Openchip & Software Technologies A tempo pienoAs a Senior Formal Verification Engineer, you will contribute to defining and leading the formal verification strategy for our systems.ResponsibilitiesWork closely with system architects and design team to establish formal verification environment and settingGuide the use of formal verification that correct formal techniques are used appropriately to improve...
-
Senior Formal Verification Engineer...
4 giorni fa
Lazio, Italia Openchip & Software Technologies A tempo pienoAs a Senior Formal Verification Engineer, you will contribute to defining and leading the formal verification strategy for our systems.Responsibilities- Work closely with system architects and design team to establish formal verification environment and setting- Guide the use of formal verification that correct formal techniques are used appropriately to...
-
Senior Verification Engineer: Soc
1 settimana fa
Lazio, Italia Openchip And Software Technologies Sl A tempo pienoA technology firm in Rome seeks a Senior Functional Verification Engineer who will interface with architecture, design, physical implementation, and software teams.You will develop verification environments and execute verification plans using SystemVerilog and UVM.The ideal candidate has a Master's degree, 7+ years of relevant experience, and strong...
-
Senior Engineer Functional Verification
1 settimana fa
Lazio, Italia Altro A tempo pienoThe Role : As a Senior Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level.Your work may involve high-level modelling UVM HW / SW Co-Debug Simulation Acceleration support.Key Responsibilities :Reading and...
-
Senior Formal Verification Engineer
2 ore fa
Lazio, Italia Openchip & Software Technologies A tempo pienoThe Role:As a Senior Formal Verification Engineer, you will contribute to defining and leading the formal verification strategy for our systems.Responsibilities:Work closely with system architects and design team to establish formal verification environment and settingGuide the use of formal verification so that correct formal techniques are used...
-
Senior Formal Verification Engineer
4 giorni fa
Lazio, Italia Openchip & Software Technologies A tempo pienoThe Role: As a Senior Formal Verification Engineer, you will contribute to defining and leading the formal verification strategy for our systems.Responsibilities:- Work closely with system architects and design team to establish formal verification environment and setting- Guide the use of formal verification so that correct formal techniques are used...
-
Senior Asic Verification Engineer
1 settimana fa
Lazio, Italia Amazon A tempo pienoA leading technology firm in Pisa is seeking an ASIC Verification Engineer to join their Camera ASIC Team.The role involves developing models for testing, rigorous debugging, and building comprehensive test plans.Candidates should have a strong background in Electrical Engineering or a related field, coupled with experience in system verification and...
-
Senior Soc Verification Engineer
1 settimana fa
Lazio, Italia Ic Resources A tempo pienoA leading semiconductor firm in Rome is seeking a Senior Design Verification Engineer to join their multicultural team.This role involves working on cutting-edge SoC designs that influence AI and HPC.Candidates must possess a Master's degree and proven experience in 3 successful tapeouts, with expertise in UVM / System Verilog.The position offers a hybrid...