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Verification Engineer

2 mesi fa

Milano, Lombardia, Italia Onsemi A tempo pieno

Job Summary:

Onsemi is seeking a skilled Verification Engineer to join our Power Management Division. As a Verification Engineer, you will be responsible for the block/top level verification of integrated circuits using Verilog and UVM.

Key Responsibilities:

  • Create block level verification test plans based on specification of power management integrated circuits
  • Build and maintain verification environment
  • Drive the quality to achieve maximum target of code and functional coverage
  • Develop regression suite to satisfy coverage targets
  • Analyze and debug failures
  • Drive innovation in verification technology
  • Write documentation and user guides for team members
  • Communicate with development team regarding coverage reviews, code reviews, deliverables, project updates, and issues

Requirements:

  • BSEE/MSEE or equivalent required with a minimum of 5 years of experience
  • Solid knowledge of UVM and familiarity with vertical reuse techniques
  • Familiarity with industry standard EDA tools
  • Strong experience in debugging
  • In-depth knowledge and several years of proven experience in digital verification
  • Hands-on experience with Verilog, System Verilog, Verilog AMS, and UVM
  • Experience in scripting: TCL, CSH, Python
  • Experience in Assertion Based Verification: PSL and SVA
  • Experience in debugging simulation failures
  • Passionate, self-driven, and able to work with remote teams
  • Experience with formal methodology for functional coverage is a plus
  • Multi-phase switching regulators a plus experience is a plus
  • Excellent verbal and written communication skills

About Onsemi:

As part of the Onsemi team, you will have the opportunity to transform your tomorrow and operate in a diverse, inclusive, and socially responsible environment.

We offer a full-time or part-time job and are open to workers belonging to categoria protetta.